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+---
+title: "Tiny Tapeout 02"
+weight: 10
+description: Overview
+
+---
+
+{{% toc %}}
+
+# Design details
+
+* [Github repository](https://github.com/TinyTapeout/tinytapeout-02)
+* [PDF datasheet](https://github.com/TinyTapeout/tinytapeout-02/raw/tt02/datasheet.pdf)
+* [Verification](https://github.com/TinyTapeout/tinytapeout-02/blob/tt02/VERIFICATION.md)
+* [Efabless MPW submission](https://platform.efabless.com/projects/1410)
+
+# Launch stats
+
+* Launched: 9 November 2023
+* Submission closed: 2 December 2023
+* Submitted to Efabless 2211Q chipIgnite shuttle using Skywater 130nm open source PDK
+
+# Project statistics
+
+* 165 projects submitted. Each project is 150 x 170um
+* Youngest submitter: [4 years old](https://tinytapeout.com/runs/tt02/031)
+* 64 used Wokwi graphical editor, 82 Verilog, 5 Amaranth, 1 Chisel
+* 39935 standard cells used across all projects.
+* Most cells used in a design was 1105, the least was 8.
+* Max utilisation was 52%
+* Total wire length 2024 mm.
+
+## Whole die render
+
+![whole die](images/tinytapeout.png)
+
+# Project Showcase
+
+## Wokwi projects
+* [UART-CC](https://tinytapeout.com/runs/tt02/057)
+* [Nano-neuron](https://tinytapeout.com/runs/tt02/066)
+* [Worm in a Maze](https://tinytapeout.com/runs/tt02/084)
+* [Wolf sheep cabbage river crossing puzzle ASIC design](https://tinytapeout.com/runs/tt02/111)
+
+## HDL projects 
+* [Avalon Semiconductors 'TBB1143' Programmable Sound Generator](https://tinytapeout.com/runs/tt02/024/)
+* [Pi (π) to 1000+ decimal places](https://tinytapeout.com/runs/tt02/036)
+* [FPGA test](https://tinytapeout.com/runs/tt02/090)
+* [RV8U - 8-bit RISC-V Microcore Processor](https://tinytapeout.com/runs/tt02/107)
+* [8-bit CPU](https://tinytapeout.com/runs/tt02/085/)
+
+# Testimonials / Endorsements
+
+An educational chip development workflow entirely in-browser, 
+from graphic entry to GDSII output for #sky130! Stunning work by 
+@matthewvenn to make an opaque area of technology accessible.
+
+---
+Last week I designed an integrated circuit for #tinytapeout, my first digital circuit design not to include any kind of cpu.
+
+---
+I still can't get over how smooth the ASIC design workflow of the #tinytapeout is 
+
+---
+Thank you @matthewvenn and everyone who made #tinytapeout happen! I made a simple counter FSM based on a UTexas presentation (linked below), but I made it all on my new Steamdeck!
+
+---
+Created a 128-Bit Memory (8 x 16-Bit Blocks) custom ASIC. I hope it will be manufactured in next shuttle run.
+Aside from that, It was amazing how seamless and easy was the whole process.
+
+---
+More on [Twitter](https://twitter.com/search?q=tinytapeout).
+