tweaking datasheet

docs/product/datasheet.yaml

@@ -7,6 +7,10 @@
 # Notes for editing:
 #   - Every text field is rendered as raw HTML, so <b>, <br> and <a href="...">
 #     work anywhere. Write a literal ampersand as &amp;.
+#   - Inside a "quoted" value (the table rows), escape any double quote the HTML
+#     needs as \" — an unescaped one ends the value and breaks the YAML:
+#         "see <a href=\"https://example.com\">the docs</a>"
+#     Values written as plain or >- folded text need no escaping.
 #   - Table `style` tokens set cell formatting, space separated:
 #       name    bold, no wrapping        (first column of most tables)
 #       mono    bold + tabular figures   (dimensions, values, signal names)
@@ -20,8 +24,8 @@
 doc:
   title: Tiny Tapeout — Datasheet
   wordmark: Tiny Tapeout
-  wordmark_sub: SHARED SILICON ASIC SHUTTLE
-  tag: DATASHEET
+  wordmark_sub: ""           # strapline under the wordmark on page 1; blank to hide
+  tag: PRODUCT DATASHEET
   ref: DOC TT-DS-2026 · REV A
   page2_title: Electrical &amp; Mechanical Specifications
 
@@ -29,6 +33,11 @@ doc:
 theme:
   navy: "#040371"            # header bars and table header rows
   red: "#ec3013"             # accent: labels, rules, prices
+  # DATASHEET tag in the header bar. Official Tiny Tapeout brand colours:
+  #   yellow #fef244 · cyan #3dfef7 · hot pink #f82381 · pink #fc9f9f · blue #040371
+  # Set tag_fg to navy for the light colours, #ffffff for hot pink.
+  tag_bg: "#fef244"
+  tag_fg: "#040371"
   ink: "#141414"             # body text
   ink_mid: "#55545f"         # secondary text
   ink_faint: "#86858f"       # captions, dashes
@@ -48,10 +57,10 @@ assets:
 # --------------------------------------------------------------------------
 
 hero:
-  eyebrow: Shared multi-project chip · SKY130 / SG13G2 / GF180MCU
+  eyebrow: Shared multi project chip · SKY130 / IHP SG13G2 / GF180MCU
   heading: From idea to chip design in minutes
   body: >-
-    Tiny Tapeout makes it more accessible than ever to get your designs manufactured on a real chip. 
+    Tiny Tapeout makes it more accessible than ever to get designs manufactured on a real chip. 
     Submit from a
     GitHub repository and we handle integration, tapeout, packaging and delivery.
   photo_alt: Tiny Tapeout ETR demoboard with a QFN-64 packaged ASIC on a breakout board
@@ -66,7 +75,7 @@ features:
   - kicker: 02 · Languages
     title: HDL agnostic
     body: >-
-      Any language that can produce Verilog RTL. Project templates and CI are
+      Any language that can produce Verilog. Project templates and CI are
       supplied for Verilog, with community provided VHDL and Chisel.
   - kicker: 03 · I/O
     title: 26 pins, plus analog
@@ -77,11 +86,11 @@ features:
     title: Three PDKs
     body: >-
       SkyWater SKY130, IHP sg13g2 and GlobalFoundries gf180mcu. Open-source PDKs
-      running multiple times per year.
+      running multiple times per year with no NDAs to sign.
   - kicker: 05 · Hardware
     title: Demoboard available
     body: >-
-      An optional RP2350-based demoboard carries your packaged chip and selects
+      An optional RP2350-based demoboard carries the packaged chip and selects
       any project on the die over USB.
   - kicker: 06 · Flexibility
     title: Bring your own flow
@@ -104,12 +113,12 @@ pricing:
        "Multiplexed analog pad access for mixed signal designs. Minimum project size of 2 tiles applies.",
        "€100 <span class=\"t-sub\">/ pin</span>"]
     - ["Demoboard PCB",
-       "Optional add-on: your packaged chip, an RP2350 demoboard and a breakout board.",
+       "Optional add-on: packaged chip on an RP2350 powered demoboard.",
        "€100 <span class=\"t-sub\">first 80 boards for individuals are subsidised</span><br>€300 <span class=\"t-sub\">academic &amp; industry</span>"]
   footnote: >-
     <b>Silicon area and the demoboard are billed separately.</b> Buying area gets
-    your design manufactured on the wafer — on its own it does not get you a
-    physical chip. To hold your chip in your hand, add the demoboard PCB. Confirm
+    your design manufactured on the chip — on its own it does not get you a
+    physical chip. To receive a physical chip, add the demoboard PCB. Confirm
     current figures at
     <b><a href="https://app.tinytapeout.com/calculator">app.tinytapeout.com/calculator</a></b>.
 
@@ -120,7 +129,7 @@ faq:
     - q: How long until I get my chip?
       a: >-
         Fabrication takes 6–9 months, then boards are assembled, tested and
-        shipped. Check <a href="https://app.tinytapeout.com/chips">tinytapeout.com/chips</a> for the schedule.</b>.
+        shipped. Check <a href="https://app.tinytapeout.com/chips">tinytapeout.com/chips</a> for the schedule.
     - q: Do I need chip design experience?
       a: >-
         No. Getting started documentation on the website and help on the Discord community helps beginners get started. 
@@ -140,7 +149,7 @@ faq:
     - q: What are the licence terms?
       a: >-
         Every design is published publicly under Apache-2.0. The minimum
-        submission is GDS + LEF, produced with any toolchain you like.
+        submission is GDS + LEF, produced with any toolchain you like. For full terms see <a href="https://tinytapeout.com/terms">tinytapeout.com/terms</a>.
 
 institutions:
   label: Taught and used at
@@ -163,15 +172,14 @@ process:
   heading: Process &amp; fabrication
   note: TILE DIMENSIONS PER PDK
   columns:
-    - {label: PDK, width: "19%", style: name}
-    - {label: Foundry, width: "21%"}
-    - {label: Node, width: "17%", style: num}
-    - {label: 1×1 tile area, width: "25%", style: mono}
-    - {label: Package}
+    - {label: PDK, width: "22%", style: name}
+    - {label: Foundry, width: "26%"}
+    - {label: Node, width: "22%", style: num}
+    - {label: 1×1 tile area, style: mono}
   rows:
-    - ["SKY130A", "SkyWater", "130 nm", "161.00 × 111.52 µm", "QFN-64"]
-    - ["ihp-sg13g2", "IHP", "130 nm BiCMOS", "202.08 × 154.98 µm", "QFN-64"]
-    - ["gf180mcuD", "GlobalFoundries", "180 nm", "346.64 × 160.72 µm", "QFN-64"]
+    - ["SKY130A", "SkyWater", "130 nm", "161.00 × 111.52 µm"]
+    - ["ihp-sg13g2", "IHP", "130 nm BiCMOS", "202.08 × 154.98 µm"]
+    - ["gf180mcuD", "GlobalFoundries", "180 nm", "346.64 × 160.72 µm"]
   footnote: >-
     One tile holds approximately <b>1,000 standard cells</b>. Larger designs are
     built from multi-tile blocks from 1×2 up to 8×4; the available sizes differ
@@ -244,9 +252,11 @@ ordering:
     - {}
   rows:
     - ["Shuttle cadence",
-       "Several shuttles per year across the three processes. Check <a href="https://app.tinytapeout.com/chips">tinytapeout.com/chips</a> for the schedule"]
+       "Several shuttles per year across the three processes. Check <a href=\"https://app.tinytapeout.com/chips\">tinytapeout.com/chips</a> for the schedule."]
     - ["Lead time",
        "6–9 months in fabrication, then assembly, test and fulfilment."]
+    - ["Volume discount",
+       "10% off orders over €10,000."]
     - ["Deliverable",
        "Silicon area only for remote or shared test, or area plus the demoboard kit: packaged chip, RP2350 demoboard and breakout board."]
     - ["Design tools",
@@ -261,5 +271,5 @@ disclaimer:
     Electrical characteristics are quoted for the SKY130A process unless stated
     otherwise — consult tinytapeout.com/specs for the process you intend to use.
     Pricing is indicative; confirm current figures with the calculator before
-    ordering. Tiny Tapeout devices are educational and prototyping parts, and are
-    not qualified for safety-critical, medical or automotive use.
+    ordering. Full terms and conditions of sale are published at
+    <a href="https://tinytapeout.com/terms">tinytapeout.com/terms</a>.