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fix: temporary workaround for ua being 4 bits wide instead of 8

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Uri Shaked
2025-05-08 22:57:40 +03:00
parent 0baf1ece4b
commit 49752ff780
1 changed files with 1 additions and 1 deletions
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project.py
+1 -1
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@@ -214,7 +214,7 @@ class Project:
]
if self.info.is_analog:
required_ports += [
["inout", "ua", 8],
["inout", "ua", 4],
]
if include_power_ports:
required_ports += [