diff --git a/rom/config.json b/rom/config.json
index fda0100..608c4c5 100644
--- a/rom/config.json
+++ b/rom/config.json
@@ -3,8 +3,6 @@
   "VERILOG_FILES": "dir::tt_um_chip_rom.v",
   
   "FP_SIZING": "absolute",
-  "DIE_AREA": [0, 0, 161.00, 111.52],
-  "FP_DEF_TEMPLATE": "ref::$DESIGN_DIR/../tech/sky130A/def/tt_block_1x1_pg.def",
 
   "FP_IO_HLENGTH": 2,
   "FP_IO_VLENGTH": 2,
@@ -13,9 +11,8 @@
   "CLOCK_PERIOD": 20,
   "CLOCK_PORT": "clk",
 
-  "//": "don't use power rings or met5",
+  "//": "don't use power rings",
   "DESIGN_IS_CORE": false,
-  "RT_MAX_LAYER": "met4",
 
   "//": "save some time",
   "RUN_KLAYOUT_XOR": false,
@@ -24,5 +21,17 @@
   "TOP_MARGIN_MULT": 1,
   "BOTTOM_MARGIN_MULT": 1,
   "LEFT_MARGIN_MULT": 6,
-  "RIGHT_MARGIN_MULT": 6
+  "RIGHT_MARGIN_MULT": 6,
+
+  "pdk::sky130A": {
+    "DIE_AREA": [0, 0, 161.0, 111.52],
+    "FP_DEF_TEMPLATE": "ref::$DESIGN_DIR/../tech/sky130A/def/tt_block_1x1_pg.def",
+    "RT_MAX_LAYER": "met4"
+  },
+
+  "pdk::ihp-sg13g2": {
+    "DIE_AREA": [0, 0, 202.08, 154.98],
+    "FP_DEF_TEMPLATE": "ref::$DESIGN_DIR/../tech/ihp-sg13g2/def/tt_block_1x1_pgvdd.def",
+    "RT_MAX_LAYER": "Metal5"
+  }
 }
diff --git a/rom/config_ihp.json b/rom/config_ihp.json
deleted file mode 100644
index b164ebd..0000000
--- a/rom/config_ihp.json
+++ /dev/null
@@ -1,28 +0,0 @@
-{
-  "DESIGN_NAME": "tt_um_chip_rom",
-  "VERILOG_FILES": "dir::tt_um_chip_rom.v",
-
-  "FP_SIZING": "absolute",
-  "DIE_AREA": [0, 0, 202.08, 154.98],
-  "FP_DEF_TEMPLATE": "ref::$DESIGN_DIR/../tech/ihp-sg13g2/def/tt_block_1x1_pgvdd.def",
-
-  "FP_IO_HLENGTH": 2,
-  "FP_IO_VLENGTH": 2,
-
-  "//": "period is in ns, so 20ns == 50mHz",
-  "CLOCK_PERIOD": 20,
-  "CLOCK_PORT": "clk",
-
-  "//": "don't use power rings or TopMetal",
-  "DESIGN_IS_CORE": false,
-  "RT_MAX_LAYER": "Metal5",
-
-  "//": "save some time",
-  "RUN_KLAYOUT_XOR": false,
-
-  "//": "reduce wasted space",
-  "TOP_MARGIN_MULT": 1,
-  "BOTTOM_MARGIN_MULT": 1,
-  "LEFT_MARGIN_MULT": 6,
-  "RIGHT_MARGIN_MULT": 6
-}