feat: add support for IHP PDK with OpenLane2 (for user projects)

This commit is contained in:
htfab
2025-03-06 08:10:24 +02:00
committed by Uri Shaked
parent 8f10bc8c74
commit 7d341a1195
19 changed files with 1623 additions and 1890 deletions
-13
View File
@@ -1,13 +0,0 @@
set clk_name core_clock
set clk_port_name clk
set clk_period 20
set clk_io_pct 0.2
set clk_port [get_ports $clk_port_name]
create_clock -name $clk_name -period $clk_period $clk_port
set non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] $clk_port]
set_input_delay [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs
set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
@@ -3,59 +3,59 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 212160 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 430 BY 1 STEP 480 0 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 202080 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 409 BY 1 STEP 480 0 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 504 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 480 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 504 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 480 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 93 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 88 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 53 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 50 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -63,175 +63,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,101 +3,101 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 642240 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 1326 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 202080 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 409 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 409 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 409 BY 1 STEP 480 0 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 1528 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 480 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 1528 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 480 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 420 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 281 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 88 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 160 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 50 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,59 +3,59 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 427200 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 878 BY 1 STEP 480 0 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 419520 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 862 BY 1 STEP 480 0 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 1016 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 998 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 1016 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 998 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 187 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 184 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 107 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 105 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -63,175 +63,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,101 +3,101 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 212160 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 430 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 430 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 430 BY 1 STEP 480 0 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 419520 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 862 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 862 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 862 BY 1 STEP 480 0 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 504 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 998 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 504 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 998 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 441 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 873 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 93 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 184 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 53 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 105 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,59 +3,59 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 642240 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1326 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1326 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1326 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 636960 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1315 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 1528 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 1516 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 1528 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 1516 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 1337 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 281 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 279 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 160 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 159 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -63,175 +63,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,101 +3,101 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 427200 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 878 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 878 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 878 BY 1 STEP 480 0 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 636960 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 1315 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 1315 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 1315 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 1016 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 1516 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 1016 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 1516 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 889 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 1326 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 187 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 279 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 107 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 159 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,59 +3,59 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 1287360 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 2670 BY 1 STEP 480 0 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 854400 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1768 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 3064 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 2034 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 3064 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 2034 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 564 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 374 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 322 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 213 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -63,175 +63,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,101 +3,101 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 1717440 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 3566 BY 1 STEP 480 0 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 854400 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 1768 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 1768 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 1768 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 4088 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 2034 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 4088 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 2034 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 1779 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 753 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 374 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 429 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 213 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,59 +3,59 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 857280 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1774 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 1289280 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 2674 BY 1 STEP 480 0 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 2040 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 3069 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 2040 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 3069 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 376 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 565 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 214 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 322 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -63,175 +63,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
@@ -3,99 +3,99 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 1287360 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 2670 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 2670 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 2670 BY 1 STEP 480 0 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 1289280 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 2674 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 2674 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 2674 BY 1 STEP 480 0 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 3064 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 3069 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 3064 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 3069 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 2681 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 2685 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 564 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 565 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 322 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
-285
View File
@@ -1,285 +0,0 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 1717440 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 3566 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 3566 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 3566 BY 1 STEP 480 0 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 4088 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 4088 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 3577 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 753 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 429 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
- VPWR + USE POWER ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
+285
View File
@@ -0,0 +1,285 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 1724160 154980 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 3580 BY 1 STEP 480 0 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 4104 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 4104 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 368 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 322 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 756 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 67 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 431 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 38 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 154480 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 154480 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 154480 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 154480 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 154480 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 154480 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 154480 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 154480 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 154480 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 154480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 154480 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 154480 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 154480 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 154480 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 154480 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 154480 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 154480 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 154480 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 154480 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 154480 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 154480 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 154480 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 154480 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 154480 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 37440 154480 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 33600 154480 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 29760 154480 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 154480 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 154480 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 154480 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 154480 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 154480 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 154480 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 154480 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 154480 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 154480 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 154480 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 154480 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 154480 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 154480 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 154480 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 154480 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 154480 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
- VPWR + USE POWER ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
@@ -3,101 +3,101 @@ DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 857280 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 1774 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 1774 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 1774 BY 1 STEP 480 0 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal1 ;
DIEAREA ( 0 0 ) ( 1724160 313740 ) ;
ROW ROW_0 CoreSite 2880 3780 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_1 CoreSite 2880 7560 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_2 CoreSite 2880 11340 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_3 CoreSite 2880 15120 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_4 CoreSite 2880 18900 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_5 CoreSite 2880 22680 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_6 CoreSite 2880 26460 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_7 CoreSite 2880 30240 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_8 CoreSite 2880 34020 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_9 CoreSite 2880 37800 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_10 CoreSite 2880 41580 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_11 CoreSite 2880 45360 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_12 CoreSite 2880 49140 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_13 CoreSite 2880 52920 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_14 CoreSite 2880 56700 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_15 CoreSite 2880 60480 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_16 CoreSite 2880 64260 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_17 CoreSite 2880 68040 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_18 CoreSite 2880 71820 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_19 CoreSite 2880 75600 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_20 CoreSite 2880 79380 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_21 CoreSite 2880 83160 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_22 CoreSite 2880 86940 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_23 CoreSite 2880 90720 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_24 CoreSite 2880 94500 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_25 CoreSite 2880 98280 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_26 CoreSite 2880 102060 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_27 CoreSite 2880 105840 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_28 CoreSite 2880 109620 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_29 CoreSite 2880 113400 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_30 CoreSite 2880 117180 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_31 CoreSite 2880 120960 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_32 CoreSite 2880 124740 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_33 CoreSite 2880 128520 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_34 CoreSite 2880 132300 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_35 CoreSite 2880 136080 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_36 CoreSite 2880 139860 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_37 CoreSite 2880 143640 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_38 CoreSite 2880 147420 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_39 CoreSite 2880 151200 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_40 CoreSite 2880 154980 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_41 CoreSite 2880 158760 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_42 CoreSite 2880 162540 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_43 CoreSite 2880 166320 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_44 CoreSite 2880 170100 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_45 CoreSite 2880 173880 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_46 CoreSite 2880 177660 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_47 CoreSite 2880 181440 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_48 CoreSite 2880 185220 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_49 CoreSite 2880 189000 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_50 CoreSite 2880 192780 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_51 CoreSite 2880 196560 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_52 CoreSite 2880 200340 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_53 CoreSite 2880 204120 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_54 CoreSite 2880 207900 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_55 CoreSite 2880 211680 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_56 CoreSite 2880 215460 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_57 CoreSite 2880 219240 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_58 CoreSite 2880 223020 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_59 CoreSite 2880 226800 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_60 CoreSite 2880 230580 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_61 CoreSite 2880 234360 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_62 CoreSite 2880 238140 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_63 CoreSite 2880 241920 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_64 CoreSite 2880 245700 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_65 CoreSite 2880 249480 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_66 CoreSite 2880 253260 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_67 CoreSite 2880 257040 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_68 CoreSite 2880 260820 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_69 CoreSite 2880 264600 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_70 CoreSite 2880 268380 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_71 CoreSite 2880 272160 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_72 CoreSite 2880 275940 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_73 CoreSite 2880 279720 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_74 CoreSite 2880 283500 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_75 CoreSite 2880 287280 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_76 CoreSite 2880 291060 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_77 CoreSite 2880 294840 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_78 CoreSite 2880 298620 N DO 3580 BY 1 STEP 480 0 ;
ROW ROW_79 CoreSite 2880 302400 FS DO 3580 BY 1 STEP 480 0 ;
ROW ROW_80 CoreSite 2880 306180 N DO 3580 BY 1 STEP 480 0 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal1 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal1 ;
TRACKS X 420 DO 2040 STEP 420 LAYER Metal2 ;
TRACKS X 420 DO 4104 STEP 420 LAYER Metal2 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal2 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal3 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal3 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal3 ;
TRACKS X 420 DO 2040 STEP 420 LAYER Metal4 ;
TRACKS X 420 DO 4104 STEP 420 LAYER Metal4 ;
TRACKS Y 420 DO 746 STEP 420 LAYER Metal4 ;
TRACKS X 480 DO 1785 STEP 480 LAYER Metal5 ;
TRACKS X 480 DO 3591 STEP 480 LAYER Metal5 ;
TRACKS Y 480 DO 653 STEP 480 LAYER Metal5 ;
TRACKS X 1460 DO 376 STEP 2280 LAYER TopMetal1 ;
TRACKS X 1460 DO 756 STEP 2280 LAYER TopMetal1 ;
TRACKS Y 1460 DO 137 STEP 2280 LAYER TopMetal1 ;
TRACKS X 2000 DO 214 STEP 4000 LAYER TopMetal2 ;
TRACKS X 2000 DO 431 STEP 4000 LAYER TopMetal2 ;
TRACKS Y 2000 DO 78 STEP 4000 LAYER TopMetal2 ;
COMPONENTS 0 ;
END COMPONENTS
@@ -105,175 +105,175 @@ PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 198720 313240 ) N ;
+ PLACED ( 187200 313240 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 202560 313240 ) N ;
+ PLACED ( 191040 313240 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 194880 313240 ) N ;
+ PLACED ( 183360 313240 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 191040 313240 ) N ;
+ PLACED ( 179520 313240 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 187200 313240 ) N ;
+ PLACED ( 175680 313240 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 183360 313240 ) N ;
+ PLACED ( 171840 313240 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 179520 313240 ) N ;
+ PLACED ( 168000 313240 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 175680 313240 ) N ;
+ PLACED ( 164160 313240 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 171840 313240 ) N ;
+ PLACED ( 160320 313240 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 168000 313240 ) N ;
+ PLACED ( 156480 313240 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 164160 313240 ) N ;
+ PLACED ( 152640 313240 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 160320 313240 ) N ;
+ PLACED ( 148800 313240 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 156480 313240 ) N ;
+ PLACED ( 144960 313240 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 152640 313240 ) N ;
+ PLACED ( 141120 313240 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 148800 313240 ) N ;
+ PLACED ( 137280 313240 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 144960 313240 ) N ;
+ PLACED ( 133440 313240 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 141120 313240 ) N ;
+ PLACED ( 129600 313240 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 137280 313240 ) N ;
+ PLACED ( 125760 313240 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 133440 313240 ) N ;
+ PLACED ( 121920 313240 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 68160 313240 ) N ;
+ PLACED ( 56640 313240 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 64320 313240 ) N ;
+ PLACED ( 52800 313240 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 60480 313240 ) N ;
+ PLACED ( 48960 313240 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 56640 313240 ) N ;
+ PLACED ( 45120 313240 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 52800 313240 ) N ;
+ PLACED ( 41280 313240 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 48960 313240 ) N ;
+ PLACED ( 37440 313240 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 45120 313240 ) N ;
+ PLACED ( 33600 313240 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 41280 313240 ) N ;
+ PLACED ( 29760 313240 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 98880 313240 ) N ;
+ PLACED ( 87360 313240 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 95040 313240 ) N ;
+ PLACED ( 83520 313240 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 91200 313240 ) N ;
+ PLACED ( 79680 313240 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 87360 313240 ) N ;
+ PLACED ( 75840 313240 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 83520 313240 ) N ;
+ PLACED ( 72000 313240 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 79680 313240 ) N ;
+ PLACED ( 68160 313240 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 75840 313240 ) N ;
+ PLACED ( 64320 313240 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 72000 313240 ) N ;
+ PLACED ( 60480 313240 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 129600 313240 ) N ;
+ PLACED ( 118080 313240 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 125760 313240 ) N ;
+ PLACED ( 114240 313240 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 121920 313240 ) N ;
+ PLACED ( 110400 313240 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 118080 313240 ) N ;
+ PLACED ( 106560 313240 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 114240 313240 ) N ;
+ PLACED ( 102720 313240 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 110400 313240 ) N ;
+ PLACED ( 98880 313240 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 106560 313240 ) N ;
+ PLACED ( 95040 313240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal5 ( -150 -500 ) ( 150 500 )
+ PLACED ( 102720 313240 ) N ;
+ PLACED ( 91200 313240 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
-52
View File
@@ -1,52 +0,0 @@
#!/bin/bash
# Based on sg13g2-update.py from IHP
# Klayout
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/klayout/tech/sg13g2.lyp $ORFS_ROOT/flow/platforms/ihp-sg13g2/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/klayout/tech/sg13g2.lyt $ORFS_ROOT/flow/platforms/ihp-sg13g2/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/klayout/tech/sg13g2.map $ORFS_ROOT/flow/platforms/ihp-sg13g2/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/klayout/tech/drc/sg13g2_maximal.lydrc $ORFS_ROOT/flow/platforms/ihp-sg13g2/drc/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/klayout/tech/drc/sg13g2_minimal.lydrc $ORFS_ROOT/flow/platforms/ihp-sg13g2/drc/
# LIB
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p35V_125C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p08V_125C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_fast_1p32V_m40C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_fast_1p65V_m40C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p20V_25C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p50V_25C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_dummy.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_fast_1p32V_3p6V_m40C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_fast_1p65V_3p6V_m40C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_slow_1p08V_3p0V_125C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_slow_1p35V_3p0V_125C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_typ_1p2V_3p3V_25C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lib/sg13g2_io_typ_1p5V_3p3V_25C.lib $ORFS_ROOT/flow/platforms/ihp-sg13g2/lib/
# GDS
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/gds/sg13g2_stdcell.gds $ORFS_ROOT/flow/platforms/ihp-sg13g2/gds/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/gds/sg13g2_io.gds $ORFS_ROOT/flow/platforms/ihp-sg13g2/gds/
# LEF
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_tech.lef $ORFS_ROOT/flow/platforms/ihp-sg13g2/lef/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_stdcell.lef $ORFS_ROOT/flow/platforms/ihp-sg13g2/lef/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lef/sg13g2_io.lef $ORFS_ROOT/flow/platforms/ihp-sg13g2/lef/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/lef/sg13g2_io_notracks.lef $ORFS_ROOT/flow/platforms/ihp-sg13g2/lef/
# Verilog
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v $ORFS_ROOT/flow/platforms/ihp-sg13g2/verilog/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/verilog/sg13g2_io.v $ORFS_ROOT/flow/platforms/ihp-sg13g2/verilog/
# CDL
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_stdcell/cdl/sg13g2_stdcell.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_io/cdl/sg13g2_io.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_1024x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_1024x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_2048x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_256x48_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_256x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_512x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_64x64_c2_bm_bist.cdl $ORFS_ROOT/flow/platforms/ihp-sg13g2/cdl/
# Techmap
cp $IHP_PDK_ROOT/ihp-sg13g2/libs.tech/openlane/sg13g2_stdcell/latch_map.v $ORFS_ROOT/flow/platforms/ihp-sg13g2/cells_latch.v
-16
View File
@@ -1,16 +0,0 @@
# global connections
add_global_connection -net {VPWR} -pin_pattern {^VDD$} -power
add_global_connection -net {VPWR} -pin_pattern {^VDDPE$}
add_global_connection -net {VPWR} -pin_pattern {^VDDCE$}
add_global_connection -net {VGND} -pin_pattern {^VSS$} -ground
add_global_connection -net {VGND} -pin_pattern {^VSSE$}
global_connect
# voltage domains
set_voltage_domain -name {CORE} -power {VPWR} -ground {VGND}
# standard cell grid
define_pdn_grid -name {grid} -voltage_domains {CORE} -pins Metal5
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} -followpins
add_pdn_stripe -grid {grid} -layer {Metal5} -width {2.200} -pitch {75.6} -offset {13.600} -extend_to_core_ring
add_pdn_connect -grid {grid} -layers {Metal1 Metal5}
+12 -12
View File
@@ -1,12 +1,12 @@
1x1: "0 0 212.16 154.98"
1x2: "0 0 212.16 313.74"
2x1: "0 0 427.20 154.98"
2x2: "0 0 427.20 313.74"
3x1: "0 0 642.24 154.98"
3x2: "0 0 642.24 313.74"
4x1: "0 0 857.28 154.98"
4x2: "0 0 857.28 313.74"
6x1: "0 0 1287.36 154.98"
6x2: "0 0 1287.36 313.74"
8x1: "0 0 1717.44 154.98"
8x2: "0 0 1717.44 313.74"
1x1: "0 0 202.08 154.98"
1x2: "0 0 202.08 313.74"
2x1: "0 0 419.52 154.98"
2x2: "0 0 419.52 313.74"
3x1: "0 0 636.96 154.98"
3x2: "0 0 636.96 313.74"
4x1: "0 0 854.40 154.98"
4x2: "0 0 854.40 313.74"
6x1: "0 0 1289.28 154.98"
6x2: "0 0 1289.28 313.74"
8x1: "0 0 1724.16 154.98"
8x2: "0 0 1724.16 313.74"