mirror of
https://github.com/TinyTapeout/tt-support-tools.git
synced 2026-11-03 04:36:09 +01:00
feat: power gating + split spline mux support
1. Read mux indices from modules_placed.yaml instead of manually calculating them 2. Add "power_switch" and "analog" fields to shuttle_index.json 3. Copy the power gate macros (tt_pg_vdd_1, tt_pg_vdd_2) into to tt_top directory
This commit is contained in:
+33
-4
@@ -50,7 +50,7 @@ class ShuttleConfig:
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with open("tt-multiplexer/cfg/modules.yaml", "w") as mux_modules_file:
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with open("tt-multiplexer/cfg/modules.yaml", "w") as mux_modules_file:
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yaml.dump(module_config, mux_modules_file)
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yaml.dump(module_config, mux_modules_file)
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res = os.system("make -C tt-multiplexer gensrc")
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res = os.system("make -C tt-multiplexer clean gensrc")
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if res != 0:
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if res != 0:
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logging.error("Failed to generate multiplexer placement configuration")
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logging.error("Failed to generate multiplexer placement configuration")
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exit(1)
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exit(1)
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@@ -60,7 +60,7 @@ class ShuttleConfig:
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with open("tt-multiplexer/cfg/modules_placed.yaml") as placed_modules_file:
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with open("tt-multiplexer/cfg/modules_placed.yaml") as placed_modules_file:
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placed_modules = yaml.safe_load(placed_modules_file)
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placed_modules = yaml.safe_load(placed_modules_file)
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for module in placed_modules["modules"]:
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for module in placed_modules["modules"]:
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mux_address = (module["y"] << 5) + module["x"]
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mux_address = (module["mux_id"] << 5) | module["blk_id"]
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module_name = "tt_um_" + module["name"]
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module_name = "tt_um_" + module["name"]
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project = next(p for p in self.projects if p.top_module == module_name)
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project = next(p for p in self.projects if p.top_module == module_name)
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project.mux_address = mux_address
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project.mux_address = mux_address
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@@ -71,6 +71,10 @@ class ShuttleConfig:
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"tiles": f"{module['width']}x{module['height']}",
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"tiles": f"{module['width']}x{module['height']}",
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"repo": project.git_url,
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"repo": project.git_url,
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"commit": project.commit_id,
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"commit": project.commit_id,
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"features": {
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"power_switch": module["pg_vdd"],
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"analog": module["analog"],
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},
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}
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}
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mux_index_reverse[module_name] = mux_address
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mux_index_reverse[module_name] = mux_address
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@@ -87,6 +91,7 @@ class ShuttleConfig:
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"repo": list(repo.remotes[0].urls)[0],
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"repo": list(repo.remotes[0].urls)[0],
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"commit": repo.commit().hexsha,
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"commit": repo.commit().hexsha,
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"commit_date": repo.commit().committed_date,
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"commit_date": repo.commit().committed_date,
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"version": 2,
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"mux": mux_index,
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"mux": mux_index,
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}
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}
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@@ -145,6 +150,20 @@ class ShuttleConfig:
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copy_print_glob(
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copy_print_glob(
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f"{lastrun}/final/spef/*/*.spef", "tt-multiplexer/ol2/tt_top/spef"
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f"{lastrun}/final/spef/*/*.spef", "tt-multiplexer/ol2/tt_top/spef"
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)
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)
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# Copy power gate macros:
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for macro in ["tt_pg_vdd_1", "tt_pg_vdd_2"]:
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copy_print(
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f"tt-multiplexer/pg/{macro}/{macro}.gds",
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f"tt-multiplexer/ol2/tt_top/gds/{macro}.gds",
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)
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copy_print(
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f"tt-multiplexer/pg/{macro}/{macro}.lef",
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f"tt-multiplexer/ol2/tt_top/lef/{macro}.lef",
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)
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copy_print(
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f"tt-multiplexer/pg/{macro}/{macro}.v",
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f"tt-multiplexer/ol2/tt_top/verilog/{macro}.v",
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)
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def copy_final_results(self):
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def copy_final_results(self):
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macros = ["tt_um_chip_rom", "tt_ctrl", "tt_mux", "tt_top"]
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macros = ["tt_um_chip_rom", "tt_ctrl", "tt_mux", "tt_top"]
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@@ -169,9 +188,19 @@ class ShuttleConfig:
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copy_function=copy_print,
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copy_function=copy_print,
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dirs_exist_ok=True,
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dirs_exist_ok=True,
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)
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)
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# Copy power gate macros:
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for macro in ["tt_pg_vdd_1", "tt_pg_vdd_2"]:
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copy_print(
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copy_print(
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f"{lastrun}/final/spef/nom_/{macro_name}.nom_.spef",
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f"tt-multiplexer/pg/{macro}/{macro}.gds",
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f"spef/{macro_name}.spef",
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f"gds/{macro}.gds",
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)
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copy_print(
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f"tt-multiplexer/pg/{macro}/{macro}.lef",
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f"lef/{macro}.lef",
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)
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copy_print(
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f"tt-multiplexer/pg/{macro}/{macro}.v",
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f"verilog/gl/{macro}.v",
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)
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)
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def create_efabless_submission(self):
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def create_efabless_submission(self):
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