improve pdf generation, update hugo website generation

docs/doc_header.md

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 title: |
   ![](pics/ttlogo.png){width=15cm}  
-    Tiny Tapeout 03 Datasheet
-subtitle: Project Repository [https://github.com/TinyTapeout/tinytapeout-03](https://github.com/TinyTapeout/tinytapeout-03)
+    Tiny Tapeout 3 Datasheet
+subtitle: Online Version [https://TinyTapeout.com/runs/TT03](https://TinyTapeout.com/runs/TT03)
 documentclass: scrartcl
-date: \today{}
+date: 24th April 2023
 geometry: "left=2cm,right=2cm,top=2cm,bottom=2.5cm"
 fontsize: 14pt
 mainfont: Latin Modern Sans
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 \pagebreak
 
+# Tiny Tapeout
+
+Tiny Tapeout is a multi project chip platform that makes it easier and cheaper than ever to get ASIC designs manufactured.  Open source tools and process design kits are used, so no licenses or NDAs are needed. 
+
+In TT03, 249 open source designs are multiplexed to 16 general purpose input/output (GPIO) pins, and after manufacture the chips are mounted to a demonstration board for easy testing. Each chip contains every design, which can be activated and tested in turn.
+
+Each participant submits documentation for their design, collected to form this datasheet! We hope you enjoy experimenting with the chip and finding interesting designs to play with.
+
+# Project statistics
+
+* 100 projects submitted, 149 projects added from TT02
+* build time for all projects 22.68 hours
+* total cells 79674
+* max cells 1287 for project 072
+* max utilisation 59.95% for project 044
+* total wire length 4079 mm
+* 94 used Wokwi, 135 Verilog, 1 myhdl, 7 Amaranth, spade 1, xls 2, migen 1, systemverilog 3, mixed radix circuit synthesis (mrcs) 1, chisel 1.
+* top 10 tags:
+    - test      : 21
+    - experiment: 6
+    - cpu       : 6
+    - timer     : 5
+    - risc      : 5
+    - game      : 4
+    - pwm       : 4
+    - music     : 4
+    - counter   : 4
+
+\pagebreak
+
+# PCB
+
+* Designs are selected with the 'select project' switches.
+* Inputs are set with the 'input' switches.
+* The clock button is wired to input0.
+* The reset button is wired to input1.
+* Outputs are displayed on the 7 segment LED.
+* A clock can be automatically generated by connecting the 'slow enable' header - see [the clock divider](#clock-divider) for more information.
+
+![PCB](pics/pcb.jpg)
+
+See [https://tinytapeout.com/specs/pcb-tt123/](https://tinytapeout.com/specs/pcb-tt123/) for more details.
+
+\pagebreak
+
 # Render of whole chip
 
 ![Full GDS](pics/tinytapeout_numbered.png)