From 96362ae28e5213655cbd5e211dbbf0fc5a2bfd8d Mon Sep 17 00:00:00 2001
From: Uri Shaked <uri@urishaked.com>
Date: Sat, 27 May 2023 17:35:54 +0300
Subject: [PATCH] feat: validate that top module name starts with "tt_um"

---
 project.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/project.py b/project.py
index 01f466b..89294c3 100644
--- a/project.py
+++ b/project.py
@@ -123,6 +123,10 @@ class Project():
             self.top_module             = f"tt_um_wokwi_{self.wokwi_id}"
             self.src_files              = self.get_wokwi_source()
             self.top_verilog_filename   = self.src_files[0]
+        
+        if not self.top_module.startswith("tt_um_"):
+            logging.error(f'top module name must start with "tt_um_" (current value: "{self.top_module}")')
+            exit(1)
 
         self.macro_instance         = f"{self.top_module}_{self.index :03}"