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style(fpga): python code formatting issues

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Uri Shaked
2025-09-02 17:11:26 +03:00
parent a95630a378
commit 9a59843db0
1 changed files with 8 additions and 15 deletions
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project.py
+6 -13
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@@ -589,24 +589,17 @@ class Project:
logging.info(f"Creating FPGA bitstream for {self}") logging.info(f"Creating FPGA bitstream for {self}")
target_map = { target_map = {
'classic': { "classic": {
'pcf': 'tt_fpga_top.pcf', "pcf": "tt_fpga_top.pcf",
'def_name': 'tt_fpga', "def_name": "tt_fpga",
}, },
"fabricfox": {"pcf": "tt_fpga_fabricfox.pcf", "def_name": "tt_ff_fpga"},
'fabricfox': {
'pcf': 'tt_fpga_fabricfox.pcf',
'def_name': 'tt_ff_fpga'
}
} }
pcf_file = target_map[args.fpga_breakout_target]['pcf'] pcf_file = target_map[args.fpga_breakout_target]["pcf"]
base_name = args.fpga_bitstream_name base_name = args.fpga_bitstream_name
if not len(base_name): if not len(base_name):
base_name = target_map[args.fpga_breakout_target]['def_name'] base_name = target_map[args.fpga_breakout_target]["def_name"]
with open(os.path.join(SCRIPT_DIR, "fpga/tt_fpga_top.v"), "r") as f: with open(os.path.join(SCRIPT_DIR, "fpga/tt_fpga_top.v"), "r") as f:
top_module_template = f.read() top_module_template = f.read()