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https://github.com/TinyTapeout/tt-support-tools.git
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feat(docs): update for tt05 (WiP)
This commit is contained in:
Uri Shaked
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---
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title: "Tiny Tapeout 03"
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weight: 20
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description: 249 designs, closed 24th April 2023
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title: "Tiny Tapeout 05"
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weight: 50
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description: 174 designs, closed 4th November 2023
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---
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{{% toc %}}
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# Design details
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* [Github repository](https://github.com/TinyTapeout/tinytapeout-03)
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* [PDF datasheet](https://github.com/TinyTapeout/tinytapeout-03/raw/main/datasheet.pdf)
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* [Verification](https://github.com/TinyTapeout/tinytapeout-03/blob/main/VERIFICATION.md)
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* [Efabless MPW submission](https://platform.efabless.com/projects/1971)
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* [Github repository](https://github.com/TinyTapeout/tinytapeout-05)
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* [PDF datasheet](https://tinytapeout.github.io/tinytapeout-05/datasheet.pdf)
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* [Efabless MPW submission](https://repositories.efabless.com/urish/tinytapeout-05)
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* [Shuttle index (JSON)](https://tinytapeout.github.io/tinytapeout-05/shuttle_index.json)
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# Launch stats
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* Launched: 1 March 2023
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* Submission closed: 24 April 2023
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* Submitted to Efabless 2304C chipIgnite shuttle using Skywater 130nm open source PDK
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# Project statistics
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* 100 projects submitted, 149 projects added from [TT02](/runs/tt02)
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* build time for all projects 22.68 hours
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* total cells 79674
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* max cells 1287 for [project 072](./072)
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* max utilisation 59.95% for [project 044](./044)
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* total wire length 4079 mm
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* 94 used Wokwi, 135 Verilog, 1 myhdl, 7 Amaranth, spade 1, xls 2, migen 1, systemverilog 3, mixed radix circuit synthesis (mrcs) 1, chisel 1.
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* top 10 tags:
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- test : 21
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- experiment: 6
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- cpu : 6
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- timer : 5
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- risc : 5
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- game : 4
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- pwm : 4
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- music : 4
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- counter : 4
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# Whole die render
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# Project Showcase
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* [12 bit PDP8](./019)
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* [Prime detector](./031)
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* [Pulse density modulators](./033)
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* [Most of the Sky130 cells](./045)
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* [Synthesizable Digital Temperature Sensor](./047)
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* [Neptune guitar tuner](./052)
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* [MSF clock](./066)
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* [Ring oscillator temperature sensor](./058)
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* [Locked QTCore-A1](./072)
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# Testimonials / Endorsements
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Awesome! Sent my design to #TinyTapeout ! Emotion! Thanks
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@matthewvenn , @marunmagesh and crew, for making it possible!
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---
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#tinytapeout 3 submission is in! I'm very thankful to be a part of such an amazing project, even if my project is small.
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---
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Just to take moment, thank you! I didn't think I would ever get to do something like this, especially with so little cost or pressure.
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For context, at work, I was testing an ASIC a supplier designed for us, and that was quite the opposite of both of these.
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---
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Hurray, also made a last minute submission, haven't felt that rush since my last university homework submission deadline... Great that a chip design can be done on a weekend, looking forward to getting all the other designs, and thanks everybody who contributed to the platform, it is really easy to use!
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---
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I just submitted a last minute project to tt03, wanted to drop by and say kudos for all the resources and the project in general!
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I've never done any hardware before (just software), but after reading the updated Code by Petzold earlier in the year and listening to an interview with Jim Keller I had my interest peeked to look at whats going on in the layers I usually take for granted. Really cool to find something like tiny tapeout, nice motivating to actually install some of the tools and give it a try.
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---
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More on [Twitter](https://twitter.com/search?q=tinytapeout).
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* Launched: 11 September 2023
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* Submission closed: 4 November 2023
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* Submitted to Efabless [2311C chipIgnite](https://efabless.com/shuttle-status) shuttle using Skywater 130nm open source PDK
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* Chips expected April 2024, PCBs expected June 2024
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+13
-13
@@ -1,15 +1,15 @@
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---
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hidden: true
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title: "{index} {title}"
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title: "{mux_address} {title}"
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weight: {weight}
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---
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## {index} : {title}
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## {mux_address} : {title}
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* Author: {author}
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* Description: {description}
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* [GitHub repository]({git_url})
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* [Most recent GDS build]({git_action})
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* [GDS submitted]({git_action})
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* {project_type} project
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* [Extra docs]({doc_link})
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* Clock: {clock_hz} Hz
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@@ -27,13 +27,13 @@ weight: {weight}
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### IO
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| # | Input | Output |
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|---|--------------|--------------|
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| 0 | {inputs[0]} | {outputs[0]} |
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| 1 | {inputs[1]} | {outputs[1]} |
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| 2 | {inputs[2]} | {outputs[2]} |
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| 3 | {inputs[3]} | {outputs[3]} |
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| 4 | {inputs[4]} | {outputs[4]} |
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| 5 | {inputs[5]} | {outputs[5]} |
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| 6 | {inputs[6]} | {outputs[6]} |
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| 7 | {inputs[7]} | {outputs[7]} |
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| # | Input | Output | Bidirectional |
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|---|--------------|--------------| -------------------|
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| 0 | {inputs[0]} | {outputs[0]} | {bidirectional[0]} |
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| 1 | {inputs[1]} | {outputs[1]} | {bidirectional[1]} |
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| 2 | {inputs[2]} | {outputs[2]} | {bidirectional[2]} |
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| 3 | {inputs[3]} | {outputs[3]} | {bidirectional[3]} |
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| 4 | {inputs[4]} | {outputs[4]} | {bidirectional[4]} |
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| 5 | {inputs[5]} | {outputs[5]} | {bidirectional[5]} |
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| 6 | {inputs[6]} | {outputs[6]} | {bidirectional[6]} |
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| 7 | {inputs[7]} | {outputs[7]} | {bidirectional[7]} |
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