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feat: Chip ROM auto generation with OpenLane 2

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So we can generate the ROM while building the shuttle's GDS
This commit is contained in:
Uri Shaked
2023-09-10 20:17:58 +03:00
parent 5e863fc333
commit cadbfbcd25
6 changed files with 87 additions and 8 deletions
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shuttle.py
+3 -1
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@@ -100,6 +100,8 @@ class ShuttleConfig():
def find_last_run(self, macro: str):
runs = f"tt-multiplexer/ol2/{macro}/runs/"
if macro == "tt_um_chip_rom":
runs = "tt/rom/runs/"
runlist = sorted(
[r for r in os.listdir(runs) if r.startswith("RUN_") and os.path.isdir(os.path.join(runs, r))]
)
@@ -115,7 +117,7 @@ class ShuttleConfig():
copy_print_glob("projects/*/*.gds", "tt-multiplexer/ol2/tt_top/gds")
copy_print_glob("projects/*/*.lef", "tt-multiplexer/ol2/tt_top/lef")
copy_print_glob("projects/*/*.v", "tt-multiplexer/ol2/tt_top/verilog")
macros = ["tt_ctrl", "tt_mux"]
macros = ["tt_um_chip_rom", "tt_ctrl", "tt_mux"]
for macro in macros:
lastrun = self.find_last_run(macro)
copy_print(f"{lastrun}/final/gds/{macro}.gds", f"tt-multiplexer/ol2/tt_top/gds/{macro}.gds")