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test framework
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# Makefile
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# See https://docs.cocotb.org/en/stable/quickstart.html for more info
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# defaults
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SIM ?= icarus
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TOPLEVEL_LANG ?= verilog
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# normal simulation
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ifneq ($(GATES),yes)
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# this is the only part you should need to modify:
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VERILOG_SOURCES += $(PWD)/cells.v $(PWD)/user_module_WOKWI_ID.v $(PWD)/test_wokwi.v
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else
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# gate level simulation requires some extra setup, you shouldn't need to touch this
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COMPILE_ARGS += -DGL_TEST
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COMPILE_ARGS += -DFUNCTIONAL
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COMPILE_ARGS += -DUSE_POWER_PINS
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COMPILE_ARGS += -DSIM
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COMPILE_ARGS += -DUNIT_DELAY=#1
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VERILOG_SOURCES += $(PDK_ROOT)/sky130A/libs.ref/sky130_fd_sc_hd/verilog/primitives.v
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VERILOG_SOURCES += $(PDK_ROOT)/sky130A/libs.ref/sky130_fd_sc_hd/verilog/sky130_fd_sc_hd.v
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# this gets copied in by the GDS action workflow
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VERILOG_SOURCES += $(PWD)/test_wokwi.v $(PWD)/gate_level_netlist.v
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endif
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# TOPLEVEL is the name of the toplevel module in your Verilog or VHDL file
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TOPLEVEL = test_wokwi
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# MODULE is the basename of the Python test file
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MODULE = test
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# include cocotb's make rules to take care of the simulator setup
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include $(shell cocotb-config --makefiles)/Makefile.sim
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'''
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Wokwi TinyTapeout truth-table based auto test sequence.
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SPDX-FileCopyrightText: © 2023 Pat Deegan, https://psychogenic.com
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SPDX-License-Identifier: Apache2.0
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'''
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import os
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import cocotb
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import testutils.truthtable as truthtable
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@cocotb.test()
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async def truthTableCompare(parentDUT):
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'''
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truthTableCompare -- loads markdown truth table and, if load succeeded, actually performs the tests.
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'''
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usermodule = parentDUT.dut
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i_bus = parentDUT.io_in
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o_bus = parentDUT.io_out
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tt = truthtable.loadMarkdownTruthTable('truthtable.md', usermodule._log)
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if tt is None:
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usermodule._log.info('No truth table loaded, no table compare test to run')
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return
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usermodule._log.debug(str(tt))
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await tt.testAll(i_bus, o_bus, usermodule._log)
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// SPDX-License-Identifier: Apache2.0
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`timescale 1ns / 1ps
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`default_nettype none
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module test_wokwi ();
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wire [7:0] io_out;
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wire [7:0] io_in;
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user_module_WOKWI_ID dut (
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`ifdef GL_TEST
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.vccd1( 1'b1),
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.vssd1( 1'b0),
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`endif
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.io_in (io_in),
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.io_out(io_out)
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);
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initial begin
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$dumpfile("wokwi_tb_WOKWI_ID.vcd");
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$dumpvars(0, test_wokwi);
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end
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endmodule
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