update INFO and README, fill in stats for tt03 index, switch to annotated index

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Matt Venn
2023-04-26 17:35:40 +02:00
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title: "Tiny Tapeout 03"
weight: 20
description: Overview
description: 249 designs, closed 24th April 2023
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# Launch stats
* Launched: 1 March 2023
* Submission closes: 24 April 2023
* Submission closed: 24 April 2023
* Submitted to Efabless 2304C chipIgnite shuttle using Skywater 130nm open source PDK
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# Project statistics
* TBA
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* 100 projects submitted, 149 projects added from [TT02](/runs/tt02)
* build time for all projects 22.68 hours
* total cells 79674
* max cells 1287 for [project 072](./072)
* max utilisation 59.95% for [project 044](./044)
* total wire length 4079353mm
* 94 used Wokwi, 135 Verilog, 1 myhdl, 7 Amaranth, spade 1, xls 2, migen 1, systemverilog 3, mixed radix circuit synthesis (mrcs) 1, chisel 1.
* top 10 tags:
- test : 21
- experiment: 6
- cpu : 6
- timer : 5
- risc : 5
- game : 4
- pwm : 4
- music : 4
- counter : 4
# Whole die render
![whole die](images/tinytapeout-03.png)
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# Project Showcase
* TBA
* [12 bit PDP8](./019)
* [Prime detector](./031)
* [Pulse density modulators](./033)
* [Most of the Sky130 cells](./045)
* [Synthesizable Digital Temperature Sensor](./047)
* [Neptune guitar tuner](./052)
* [MSF clock](./066)
* [Ring oscillator temperature sensor](./058)
* [Locked QTCore-A1](./072)
# Testimonials / Endorsements
An educational chip development workflow entirely in-browser,
from graphic entry to GDSII output for #sky130! Stunning work by
@matthewvenn to make an opaque area of technology accessible.
Awesome! Sent my design to #TinyTapeout ! Emotion! Thanks
@matthewvenn , @marunmagesh and crew, for making it possible!
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Last week I designed an integrated circuit for #tinytapeout, my first digital circuit design not to include any kind of cpu.
#tinytapeout 3 submission is in! I'm very thankful to be a part of such an amazing project, even if my project is small.
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I still can't get over how smooth the ASIC design workflow of the #tinytapeout is
Just to take moment, thank you! I didn't think I would ever get to do something like this, especially with so little cost or pressure.
For context, at work, I was testing an ASIC a supplier designed for us, and that was quite the opposite of both of these.
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Thank you @matthewvenn and everyone who made #tinytapeout happen! I made a simple counter FSM based on a UTexas presentation (linked below), but I made it all on my new Steamdeck!
Hurray, also made a last minute submission, haven't felt that rush since my last university homework submission deadline... Great that a chip design can be done on a weekend, looking forward to getting all the other designs, and thanks everybody who contributed to the platform, it is really easy to use!
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Created a 128-Bit Memory (8 x 16-Bit Blocks) custom ASIC. I hope it will be manufactured in next shuttle run.
Aside from that, It was amazing how seamless and easy was the whole process.
I just submitted a last minute project to tt03, wanted to drop by and say kudos for all the resources and the project in general!
I've never done any hardware before (just software), but after reading the updated Code by Petzold earlier in the year and listening to an interview with Jim Keller I had my interest peeked to look at whats going on in the layers I usually take for granted. Really cool to find something like tiny tapeout, nice motivating to actually install some of the tools and give it a try.
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More on [Twitter](https://twitter.com/search?q=tinytapeout).
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