TinyTapeout/tt-support-tools
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470 Commits 33 Branches 0 Tags
24ea6a232a239218e7bd2ee23368ead4e7645f4c
Commit Graph
60 Commits
Author SHA1 Message Date
htfab 24ea6a232a fix(precheck): force single-threaded mode in sky130A_mr.drc 
avoids intermittent segfaults in klayout FEOL check
 2026-03-12 21:43:13 +01:00
Uri Shaked 6839bd1295 feat(precheck): json file with tool versions 2026-02-24 09:51:16 +00:00
htfab 45fa89984f feat(precheck): add analog pin check for ihp-sg13g2 2026-02-21 07:16:36 +02:00
htfab cff6920d69 fix(precheck): add nofill & slit layers to IHP valid layer list 2026-02-18 14:27:22 +02:00
htfab d28b20433e feat(precheck): use new DRC deck for IHP 
needs IHP PDK 34c00bdd15efd3406ab028896d2182236aad3aa7 (2025.11.25) or later
 2026-02-17 20:50:41 +02:00
htfab 57cc5a39d6 feat(precheck): allow more customization for run_klayout() 2026-02-17 20:50:41 +02:00
Uri Shaked 88470b895b fix(precheck): disable analog pin check for ihp-sg13g2 
The check currently uses hard-coded sky130A specific layer names and pin sizes.
 2026-02-12 22:10:36 +02:00
Uri Shaked d9b4ee2345 feat(precheck): look for the .lef file in ../lef/ 2025-12-11 19:45:15 +02:00
Uri Shaked ef96fa4e1b fix(precheck): incorrect minimum power rail width for ihp-sg13g2 2025-12-11 19:41:59 +02:00
Uri Shaked b57f798ec4 fix(precheck): disable additional min density checks for ihp-sg13g2 
Disable GatPoly, Activ, and TopMetal2 min density checks
 2025-12-05 10:00:44 +02:00
Uri Shaked de6544ea80 fix(precheck): hardcoded layer name in error message 2025-12-05 09:23:34 +02:00
Uri Shaked 45eb4a6b5d fix(precheck): update sg13g2_mr deck to be compatible with klayout 0.30 2025-11-24 14:38:39 +02:00
Uri Shaked c813d4796a fix(precheck): adapt for new IHP def files 
TopMetal1 is allowed now, and the power pins moved from Metal5 to TopMetal1.
 2025-11-24 14:20:04 +02:00
kris j 9a14f318d6 feat(precheck): check if power pins have USE in definition (#139) 
* feat(precheck): check if power pins have `USE` in definition

* fix: expect zero or more spaces, instead of one or more

* feat(precheck): check for missing `USE POWER`

* feat(precheck): check for missing `USE GROUND`

* feat(precheck): add simple README with link to LEF/DEF reference manual
 2025-11-20 08:57:05 +02:00
Uri Shaked 5c4503072e feat(precheck): oas file support #134 
replace legacy .gds.br support with .oas file support
 2025-11-16 10:04:22 +02:00
htfab 26675866c7 fix(precheck): add "gds maskhints yes" to magic drc 2025-11-15 18:07:03 +02:00
Uri Shaked b1fca8f72d chore(precheck): update klayout sky130A DRC deck 
following chipfoundry/mpw_precheck#101
 2025-11-08 08:48:14 +02:00
htfab 6aa09fc2e9 fix(precheck): some sky130 layer names missing on older PDK versions 2025-11-07 23:14:45 +01:00
htfab 3e3285edb3 chore(precheck): bump magic & klayout nix packages 2025-10-30 02:39:21 +01:00
htfab 67541ef759 feat(precheck): add pin_check for gf180mcuD 
and also enable magic drc
 2025-10-29 19:14:45 +02:00
htfab 0954014041 feat(precheck): initial gf180mcuD support 2025-10-28 21:41:02 +02:00
Uri Shaked 44d164955d fix(precheck): read the PDK name from the PDK environment variable 2025-09-29 16:16:20 +03:00
Uri Shaked 0529b699de fix(precheck): rename "sky130" to "sky130A" 
Keep the tech naming consistent with the rest of tt-support-tools code
 2025-09-13 20:28:54 +03:00
Uri Shaked 28fd25f684 refactor: separate tech specific code 
Make the codebase more PDK-agnostic by moving tech-specific code to `tech.py` and tech specific files (e.g. def files, tile_sizes.yaml) to `tech/<pdkname>` subdirectory.
 2025-09-13 20:28:48 +03:00
Uri Shaked 278718ca12 chore: update efabless -> chipfoundry 2025-09-08 15:44:33 +03:00
htfab e96fa6fc6f fix(precheck): use non-greedy regex for stripping verilog comments 
as suggested by @smunaut
 2025-09-01 23:28:25 +02:00
Uri Shaked bebe93d93b fix(precheck): add HeatRes.drawing to list of valid IHP SG13G2 layers 2025-05-09 22:26:37 +03:00
Uri Shaked 0baf1ece4b feat(precheck): IHP KLayout DRC 2025-04-16 17:56:01 +03:00
Uri Shaked fe543406d6 fix(precheck): disable power pin check for IHP 
IHP provided verilog models do not have power ports, so we don't use powered netlists, and thus no need to check for power pins in the GL verilog.
 2025-04-16 17:12:34 +03:00
Uri Shaked 746789020e fix(precheck): update valid list of IHP SG13G2 layers 
List given by @smunaut
 2025-04-16 16:58:45 +03:00
Uri Shaked c350c2ed16 feat(precheck): initial IHP support 
still missing the IHP Klayout DRC deck
 2025-04-16 08:28:51 +03:00
htfab 022164a023 refactor(precheck): use gdstk.offset() in connectivity checks 
as suggested by @tatzelbrumm
 2025-02-17 09:16:00 +02:00
htfab 055de1f9fe fix(precheck): improve error messages for connectivity checks 2025-02-17 09:00:55 +02:00
htfab 2241597d6b feat(precheck): add extra prechecks 
- no shapes outside project area
- VPWR/VGND present, VAPWR present iff uses_3v3
- no invalid layers
- cell names don't have '#' or '/'
- urpm to nwell spacing satisfies DRC
- analog pins have adjacent metal iff marked as used
 2025-01-31 17:53:57 +02:00
htfabandhtfab 69b12ddf2c feat(precheck): add support for .gds.br compressed layouts (#87) 
* feat(precheck): add support for .gds.br compressed layouts

* fix(precheck): adapt the test suite to changed klayout_checks() signature

---------

Co-authored-by: htfab <mpw@htamas.net>
 2024-12-12 11:33:38 +02:00
Uri Shaked 96f3577cad chore(precheck): update klayout DRC deck 
following efabless/mpw_precheck#289
 2024-09-11 23:39:59 +03:00
htfab 8e41bfb1d9 feat(precheck): add support for 3v3 templates 2024-06-24 07:13:00 +03:00
Uri Shaked 674fdc7ef7 fix(precheck): update analog template paths 2024-06-18 14:29:40 +03:00
htfab 58dc0db1c1 fix: resolve version conflicts gdstk<->numpy & openlane2<->klayout 2024-06-17 08:47:46 +03:00
htfab f56fdf7cbe feat(test-precheck): support compound ports 2024-05-28 22:52:28 +03:00
htfab 12621b9a14 feat(precheck): combine rectangles within the same port 2024-05-28 22:52:28 +03:00
htfab 68e6da5b9f fix(precheck): typo 2024-05-08 20:08:10 +03:00
htfab 96bfcce676 feat(precheck): add testcase for overlapping pins 2024-05-08 20:08:10 +03:00
htfab 41b9907da4 feat(precheck): extend error message for overlapping pins 2024-05-08 20:08:10 +03:00
htfab 39162225ce feat(precheck): fail on overlapping pins 2024-05-08 20:08:10 +03:00
Uri Shaked d2d27ab36c fix(precheck): fails on projects in shuttle repository 
It can't find info.yaml, since it's looking for it in the parent directory of the gds while info.yaml is in the same directory as the gds.
 2024-05-07 09:01:09 +03:00
htfab 64bf6626f9 fix(precheck): make errors more descriptive 2024-05-01 08:54:11 +03:00
htfab 97e65e74f6 feat(precheck): add pin checks 
Checks for missing or invalid pins, wrong pin dimensions or layers.
 2024-05-01 00:55:53 +03:00
Uri Shaked 4b2bb6d000 feat(precheck): verify top level macro name 
This issue appeared in tt06, in the following analog project: https://github.com/davidparent/tt_resistor_test/tree/fdc74c92ec0ec2b9817f0ea6823daa62f8ca5401/
 2024-04-23 22:57:52 +03:00
Uri Shaked a6d2dae7aa fix(precheck): remove unused --markdown-report arg 
the markdown report is always generated anyway
 2024-04-21 00:18:35 +03:00