Uri Shaked
b7b993ac50
fix(precheck): allow any klayout 0.30.x from pip
...
KLayout removes older releases from PyPI: KLayout/klayout#1670
2026-10-29 22:27:27 +01:00
Uri Shaked
617676148e
feat(ihp-sg13cmos5l): analog project support
2026-10-29 21:32:06 +01:00
Uri Shaked
2278ea867e
feat: add ihp-sg13cmos5l PDK alongside ihp-sg13g2
...
Based on work done in the ihp-sg13cmos5l branch
2026-10-27 11:17:19 +01:00
htfab
ff75e344cd
feat(precheck): port the gds/lef pin consistency check to gf180mcuD
2026-07-29 17:39:19 +02:00
htfab
d869909e41
fix(precheck): rewrite the boundary check
...
The previous version of the boundary check was a quick heuristic where
we compared the bounding box of the design to that of the prBoundary layer.
Over time we came across some designs where this is insufficient.
The new check compares the bounding box to the correct project size
based on the .def template and verifies that there is a rectangle of
this exact size in the prBoundary layer at the top level.
The patch also abstracts parsing the .def template into a separate
function since we now use it in two different checks.
2026-07-28 21:21:12 +02:00
Uri Shaked
d65690eeb1
fix(precheck): bump pip klayout to 0.30.8 to match the DRC binary
2026-06-15 17:03:35 +03:00
Uri Shaked
d1bbd34d95
feat(precheck/gf180mcuD): update to latest PDK
2026-06-14 20:23:49 +03:00
Uri Shaked
50998ec8f8
feat(precheck/gf180mcuD): run KLayout DRC via PDK run_drc.py
...
- Density related rules skipped (irrelevant for user projects)
- Add docopt dependecy (required by the PDK's run_drc.py)
2026-06-14 16:50:19 +03:00
Uri Shaked
1de6149a61
fix(precheck): disable gf180mcuD magic DRC
...
Sylvain: The techfile for GF180 is still a bit dodgy in some areas,
especially when reading from GDS and it's rejecting perfectly valid designs.
Wafer.space relies only on KLayout DRC for acceptance so we should do
too for the time being.
2026-06-09 18:03:55 +03:00
htfab
9be228c021
fix(precheck/gf180mcuD): set power strip min width to 0.8 um
2026-06-02 10:56:05 +02:00
Uri Shaked
ed26854793
refactor: rename uses_3v3 to uses_vapwr
...
The flag enables a second power supply (VAPWR), not necessarily 3.3V (gf180's core is already 3v3), so "uses_3v3" no longer accurately describes its purpose.
Rename it across project_info, precheck, project and shuttle, and update the validation message accordingly.
The legacy "uses_3v3" key is still accepted when reading info.yaml, so existing project configs keep working.
2026-05-31 16:18:24 +03:00
Uri Shaked
d5b156e241
feat(precheck/gf180mcuD): analog template selection + pin check
2026-05-31 15:40:42 +03:00
htfab
5a894537dc
fix(precheck): support integers (without '.' decimal separator) in LEF ( #171 )
2026-05-11 08:32:46 +02:00
Sylvain Munaut
a6c7030a0a
fix(precheck/sky130A): Fix MR_licon.SP6 again
...
Previous fix caused issue with resistors since that check must not
apply to anything in prec_res zone according to licon.9
Signed-off-by: Sylvain Munaut <tnt@246tNt.com >
2026-05-05 22:26:43 +02:00
htfab
afbe0d69fc
fix(precheck/sky130A): add MR_licon.SP.6_overlap rule to MR ( #169 )
...
as suggested by @smunaut
2026-05-04 13:53:07 +02:00
htfab
e63fad485d
fix(precheck): fix bug in parsing fixed-point numbers in LEF ( #168 )
...
as suggested by @smunaut
2026-05-04 13:52:49 +02:00
htfab
d4626aaed7
feat(precheck/gf180mcuD): add test for antenna check
2026-05-03 09:26:53 +02:00
htfab
c904c49f53
feat(precheck/gf180mcuD): add antenna check
2026-05-03 09:26:53 +02:00
Uri Shaked
b7acfdc00e
fix(precheck): forbid prBoundary.drawing (189/0) for ihp shuttles
2026-03-30 16:49:26 +03:00
htfab
201d0273dc
feat(precheck): add Verilog syntax check
2026-03-26 13:05:34 +01:00
htfab
34f7730b3a
fix(precheck): force single-threaded mode in sky130A_mr.drc
...
avoids intermittent segfaults in klayout FEOL check
2026-03-12 22:48:48 +02:00
Uri Shaked
6839bd1295
feat(precheck): json file with tool versions
2026-02-24 09:51:16 +00:00
htfab
45fa89984f
feat(precheck): add analog pin check for ihp-sg13g2
2026-02-21 07:16:36 +02:00
htfab
cff6920d69
fix(precheck): add nofill & slit layers to IHP valid layer list
2026-02-18 14:27:22 +02:00
htfab
d28b20433e
feat(precheck): use new DRC deck for IHP
...
needs IHP PDK 34c00bdd15efd3406ab028896d2182236aad3aa7 (2025.11.25) or later
2026-02-17 20:50:41 +02:00
htfab
57cc5a39d6
feat(precheck): allow more customization for run_klayout()
2026-02-17 20:50:41 +02:00
Uri Shaked
88470b895b
fix(precheck): disable analog pin check for ihp-sg13g2
...
The check currently uses hard-coded sky130A specific layer names and pin sizes.
2026-02-12 22:10:36 +02:00
Uri Shaked
d9b4ee2345
feat(precheck): look for the .lef file in ../lef/
2025-12-11 19:45:15 +02:00
Uri Shaked
ef96fa4e1b
fix(precheck): incorrect minimum power rail width for ihp-sg13g2
2025-12-11 19:41:59 +02:00
Uri Shaked
b57f798ec4
fix(precheck): disable additional min density checks for ihp-sg13g2
...
Disable GatPoly, Activ, and TopMetal2 min density checks
2025-12-05 10:00:44 +02:00
Uri Shaked
de6544ea80
fix(precheck): hardcoded layer name in error message
2025-12-05 09:23:34 +02:00
Uri Shaked
45eb4a6b5d
fix(precheck): update sg13g2_mr deck to be compatible with klayout 0.30
2025-11-24 14:38:39 +02:00
Uri Shaked
c813d4796a
fix(precheck): adapt for new IHP def files
...
TopMetal1 is allowed now, and the power pins moved from Metal5 to TopMetal1.
2025-11-24 14:20:04 +02:00
kris j
9a14f318d6
feat(precheck): check if power pins have USE in definition ( #139 )
...
* feat(precheck): check if power pins have `USE` in definition
* fix: expect zero or more spaces, instead of one or more
* feat(precheck): check for missing `USE POWER`
* feat(precheck): check for missing `USE GROUND`
* feat(precheck): add simple README with link to LEF/DEF reference manual
2025-11-20 08:57:05 +02:00
Uri Shaked
5c4503072e
feat(precheck): oas file support #134
...
replace legacy .gds.br support with .oas file support
2025-11-16 10:04:22 +02:00
htfab
26675866c7
fix(precheck): add "gds maskhints yes" to magic drc
2025-11-15 18:07:03 +02:00
Uri Shaked
b1fca8f72d
chore(precheck): update klayout sky130A DRC deck
...
following chipfoundry/mpw_precheck#101
2025-11-08 08:48:14 +02:00
htfab
6aa09fc2e9
fix(precheck): some sky130 layer names missing on older PDK versions
2025-11-07 23:14:45 +01:00
htfab
3e3285edb3
chore(precheck): bump magic & klayout nix packages
2025-10-30 02:39:21 +01:00
htfab
67541ef759
feat(precheck): add pin_check for gf180mcuD
...
and also enable magic drc
2025-10-29 19:14:45 +02:00
htfab
0954014041
feat(precheck): initial gf180mcuD support
2025-10-28 21:41:02 +02:00
Uri Shaked
44d164955d
fix(precheck): read the PDK name from the PDK environment variable
2025-09-29 16:16:20 +03:00
Uri Shaked
0529b699de
fix(precheck): rename "sky130" to "sky130A"
...
Keep the tech naming consistent with the rest of tt-support-tools code
2025-09-13 20:28:54 +03:00
Uri Shaked
28fd25f684
refactor: separate tech specific code
...
Make the codebase more PDK-agnostic by moving tech-specific code to `tech.py` and tech specific files (e.g. def files, tile_sizes.yaml) to `tech/<pdkname>` subdirectory.
2025-09-13 20:28:48 +03:00
Uri Shaked
278718ca12
chore: update efabless -> chipfoundry
2025-09-08 15:44:33 +03:00
htfab
e96fa6fc6f
fix(precheck): use non-greedy regex for stripping verilog comments
...
as suggested by @smunaut
2025-09-01 23:28:25 +02:00
Uri Shaked
bebe93d93b
fix(precheck): add HeatRes.drawing to list of valid IHP SG13G2 layers
2025-05-09 22:26:37 +03:00
Uri Shaked
0baf1ece4b
feat(precheck): IHP KLayout DRC
2025-04-16 17:56:01 +03:00
Uri Shaked
fe543406d6
fix(precheck): disable power pin check for IHP
...
IHP provided verilog models do not have power ports, so we don't use powered netlists, and thus no need to check for power pins in the GL verilog.
2025-04-16 17:12:34 +03:00
Uri Shaked
746789020e
fix(precheck): update valid list of IHP SG13G2 layers
...
List given by @smunaut
2025-04-16 16:58:45 +03:00