TinyTapeout/tt-support-tools
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a507fe53aec4248b839dfc278ef57151ba4e0792
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108 Commits
Author SHA1 Message Date
Kristaps Jurkans a507fe53ae feat(datasheet): add typst datasheet flow 
This is a squash of 5 commits in order to add the new datasheet flow.

fix(datasheet): ensure datasheet can use images properly

fix(datasheet): white page when funding was not specified

This was caused by creating a page before first checking whether there was any content for that page beforehand, so it would result in a rogue white page with no content.

fix(datasheet): missing analog pin tables

fix(datasheet): tweak pandoc settings

Switching from `gfm` to `markdown` should enable more formatting options. The extensions have been configured to be similar to `gfm` but provide some additional things, like `line_blocks` and `lists_without_preceding_blankline`s.
 2025-12-04 13:08:00 +00:00
Uri Shaked b176ed7ced feat(orfs): allow overriding PDN config 2024-10-25 10:02:14 +03:00
htfab 0c16b17395 fix(orfs): link to the 1.2V version of the cell library pdf from the summary 2024-10-21 19:23:23 +03:00
htfab 6fbbea4bce fix(orfs): fail if violations remain after detailed routing 2024-10-21 14:20:32 +03:00
htfabandhtfab 74edb57680 fix(orfs): use our fork of the IHP PDK (#73) 
* fix(orfs): remove special handling of DRC error Pin.f.M5

* fix(orfs): remove patch for IHP PDK

We use our own fork now with the patch integrated.

* fix(orfs): allow updating ORFS platform files from IHP PDK

---------

Co-authored-by: htfab <mpw@htamas.net>
 2024-10-20 08:11:56 +03:00
htfabandhtfab dcab9fc353 feat: add DRC & LVS for ORFS (#72) 
Co-authored-by: htfab <mpw@htamas.net>
 2024-10-14 15:04:43 +03:00
htfab 30dbb0cd1b feat: merge VHDL support branch 
os.makedirs() line contributed by @gfcwfzkm
 2024-09-30 18:19:46 +03:00
htfab d862b7845c feat: change run tag from ihp to wokwi 2024-09-24 23:01:57 +03:00
htfab f8cc66a644 feat: add experimental IHP support 2024-09-24 22:23:12 +03:00
htfab dd77f85278 fix: handle PDK_ROOT being unset for volare 2024-09-23 06:40:11 +03:00
htfab d497541361 fix: handle PDK_ROOT being unset for the docker command line 2024-09-23 06:40:11 +03:00
htfab 3627058a39 fix: adjust glob pattern for util percentage 2024-09-20 15:30:05 +03:00
htfab da472a9133 fix: add --docker-no-tty to openlane2 command line 2024-09-20 15:30:05 +03:00
htfab 3079439e81 fix: make openlane2 install the PDK into $PDK_ROOT 2024-09-10 18:46:25 +03:00
Uri Shaked 587b6cb0d0 fix: type error 2024-08-30 11:44:13 +03:00
Uri Shaked d3ed62bc00 fix(configure): support declaring power ports as inout 
OpenLane 2.1.1 produces a verilog netlist with the power ports declared as "inout", where as 2.0.8 and earlier declared the power ports as "input". Change our scripts to accept "inout" as a valid direction for the power ports.
 2024-08-30 11:39:52 +03:00
Zachary Catlin 12b407dea9 Fixed PDK cell doc URLs 
Currently, the links produced by tt_tool.py --print-cell-category
lead to 404s; this commit uses the correct URLs.

Signed-off-by: Zachary Catlin <zec@box255.org>
 2024-08-09 07:48:05 -04:00
Uri Shaked 3c88e6eb04 cleanup(website): remove hugo related functionality 
Project pages are now dynamically generated based on the shuttle index.
 2024-07-16 15:15:09 +03:00
htfab 8e41bfb1d9 feat(precheck): add support for 3v3 templates 2024-06-24 07:13:00 +03:00
htfab b36543e651 refactor!(tt_tool): use same dir for wokwi_test as for test 2024-06-06 07:33:49 +03:00
Uri Shaked 6924b7464b fix: hardening fails with openlane v2024.05.28 
/bin/bash is no longer present in the container image, so we had to remove it from the docker command line
 2024-06-02 10:22:53 +03:00
Uri Shaked c7cd708524 fix: remove support for openlane yaml config 
see https://github.com/TinyTapeout/tt-support-tools/pull/55#issuecomment-2138626540 for reasoning
 2024-06-01 17:25:23 +03:00
htfabandhtfab 59c9f8e2db feat: add support for json config files (#55) 
* feat: add support for json config files

* feat: make json the preferred config format

* feat: allow yaml config format

* feat!: remove compatibility tweaks for tt07's config.tcl

---------

Co-authored-by: htfab <mpw@htamas.net>
 2024-06-01 17:23:33 +03:00
Uri Shaked 11b2d371b4 fix(documentation): exit with error code if PDF generation fails 2024-05-29 17:02:39 +03:00
htfab 2b48c36ecb fix: remove progress bar in github actions 
It breaks the log as every refresh is shown as a new line.
 2024-05-17 20:51:32 +03:00
htfab a791fde25c feat: allow hardening with openlane2 2024-05-16 23:34:05 +03:00
matt venn d8d3836cf8 Update project.py 
fix 'how to use' error message
 2024-05-14 15:15:53 +02:00
htfab c36f3a3615 feat(datasheet): add analog pins to project pdf 2024-05-07 08:47:00 +03:00
htfab b3321a93c6 feat(datasheet): add analog pins to Project class 2024-05-07 08:47:00 +03:00
htfab 8ddef688df feat(datasheet): use mustache for project_preview 2024-05-07 08:47:00 +03:00
Uri Shaked 0c171af9b4 feat(fpga): read seed / target frequency from environment 
Read the values from TT_FPGA_SEED / TT_FPGA_FREQ, and default to 12 MHz frequency.
 2024-05-01 23:47:35 +03:00
Uri Shaked b6ec741349 feat(fpga): initial implementation 
Adds a new `tt_tool.py --create-fpga-bitstream` flag that creates a TT Sim FPGA bitstream from the user's project.
 2024-05-01 23:13:21 +03:00
Uri Shaked 60c8ff8b8e fix(configure): update synth stats paths for tt06 2024-04-26 12:23:38 +03:00
htfab bc500a3a56 fix(docs): remove text labels from subcells in png 2024-04-17 14:29:49 +03:00
Uri Shaked d5153c3f22 fix(tt_tool): clock issue warnings break with custom openlane configs 
they break when some of the steps are disabled, e.g. https://github.com/iic-jku/jku-tt06-tdc-v2/
 2024-04-13 20:31:27 +02:00
Uri Shaked 9c7ebcb731 feat(tt_tool): display clock issue warnings #34 2024-04-08 15:10:47 +03:00
Uri Shaked 16fb26f5e6 fix(datasheet): images missing #32 2024-04-08 15:04:28 +03:00
Uri Shaked 1ebe1ef29b fix(configure): correct project type in shuttle_index.md for analog projects 
was "HDL", should be "Analog"
 2024-04-06 14:51:48 +03:00
Uri Shaked ca190609c6 fix: pass yosys commands through an environment variable 
should be safer than passing them on shell commandline
 2024-03-30 01:32:08 +03:00
Uri Shaked 1e052887a2 fix: yowasp-yosys chokes on complex verilog modules 
reproduces with https://github.com/Lucaz97/tt06_RNG2

as a workaround, we first try to read the first verilog source file, and only if we can't find the top level verilog module there, we read the rest of the files.
 2024-03-30 01:12:06 +03:00
Uri Shaked b1a2a3bb98 feat(configure): initial support for analog module placement 2024-03-16 23:26:56 +02:00
Uri Shaked 51bb1d0bf5 fix: don't generate pg_vdd property in tt-multiplexer's modules.yaml 
All user macros are now power gated by default
 2024-03-13 23:03:07 +02:00
Uri Shaked 12c79b065c fix(tt_tool): broken PNG render for openlane projects 2024-03-01 15:43:45 +02:00
Uri Shaked 49b8e8724c feat(tt_tool): support for specifying custom GDS file for PNG render 
tinytapeout/tt-gds-action#12
 2024-02-29 22:38:35 +02:00
Uri Shaked f6fae279c1 fix: projects that manually instantiate standard cells fail 
remove an assestion that causes these projects to fail

fix #31
 2024-02-21 15:31:28 +02:00
Uri Shaked e8c5040dc5 fix(tt_tool): fails on non-analog projects 2024-02-01 13:06:19 +02:00
Uri Shaked 7126553f3c feat: analog project support 
handle ua[7:0] pins in analog modules
 2024-01-30 21:43:04 +02:00
Uri Shaked 87bc6c0738 fix(configure): running with --update-shuttle fails 
We're looking for the RTL source file instead of the GL files
 2024-01-23 14:23:58 +02:00
Uri Shaked 66e1fc3ff0 feat: update tt_block def files for tt06 
The tile sizes have slightly changed as we plan using the openframe caravel variant, as well as power gating all the projects on the shuttle.
 2023-12-31 23:58:59 +02:00
Uri Shaked 9d802fbe8c fix(tt_tool): fails on Wokwi projects 2023-12-26 15:06:28 +02:00