mirror of
https://github.com/TinyTapeout/tt-support-tools.git
synced 2026-11-03 04:36:09 +01:00
Uri Shaked
c35546a7e4
This change moves the power rails to TopMetal1, and makes the TopMetal1 layer available for the user designs. In addition, we now let LibreLane install the PDK instead of having to install it separately.
256 lines
9.2 KiB
Python
256 lines
9.2 KiB
Python
import json
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import os
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from typing import Dict, List, Literal, Pattern, Protocol, Tuple, TypedDict, Union
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TechName = Literal["sky130A", "ihp-sg13g2", "gf180mcuD"]
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class CellDefinition(TypedDict):
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url: str
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description: str
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class PDKVersionInfo(TypedDict):
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source: str
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version: str
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class Tech(Protocol):
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def_suffix: str
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librelane_pdk_args: str
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tt_corner: str
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cell_regexp: str
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netlist_type: Literal["pnl", "nl"]
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project_top_metal_layer: str
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""" Extra PDK-specific configuration for LibreLane """
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librelane_config: Dict[
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str, Union[bool, int, float, str, List[str], Dict[str, List[str]]]
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]
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""" These layers will be removed from the SVG render of the layout """
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label_layers: List[Tuple[int, int]]
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""" These layers are hardly visible and will also be removed from the SVG render of the layout """
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buried_layers: List[Tuple[int, int]]
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""" Cells with names matching this regex will have their layers shuffled in the SVG render """
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scramble_cells: None | str | Pattern
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""" Default name of the mux config YAML file. """
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mux_config_yaml_name: str
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""" Lists all of the analog switch / power gate macros that need to be copied to the tt_top directory. """
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mux_macros: List[str]
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""" Lists all of the extra logo macros that need to be copied to the tt_top directory. """
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extra_logo_macros: List[str]
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""" GDS layer/datatype for the place&route boundary marker layer """
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prboundary_layer: Tuple[int, int]
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""" GDS layer/datatype for the metal layer used in the logo """
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logo_layer: Tuple[int, int]
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""" LEF layer name for the metal layer used in the logo """
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logo_layer_name: str
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""" Logo pixel size in microns """
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logo_pixel_size: float
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def read_pdk_version(self, pdk_root: str) -> PDKVersionInfo:
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raise NotImplementedError()
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def load_cell_definitions(self) -> Dict[str, CellDefinition]:
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raise NotImplementedError()
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def parse_openpdks_pdk_version(
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sources_file: str, expected_source: str = "open_pdks"
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) -> PDKVersionInfo:
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with open(sources_file) as f:
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pdk_source, pdk_version = f.read().strip().split(" ")
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assert pdk_source == expected_source
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return PDKVersionInfo(source=pdk_source, version=pdk_version)
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class Sky130Tech(Tech):
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def_suffix = "pg"
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librelane_pdk_args = ""
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tt_corner = "nom_tt_025C_1v80"
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cell_regexp = (
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r"^\s*sky130_(?P<cell_lib>\S+)__(?P<cell_name>\S+)_(?P<cell_drive>\d+)"
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)
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netlist_type = "pnl"
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project_top_metal_layer = "met4"
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librelane_config = {}
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label_layers = [
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(64, 59), # pwell.label
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(64, 5), # nwell.label
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(67, 5), # li1.label
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(68, 5), # met1.label
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(69, 5), # met2.label
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(70, 5), # met3.label
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(71, 5), # met4.label
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]
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buried_layers = [
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(64, 16), # nwell.pin
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(65, 44), # tap.drawing
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(68, 16), # met1.pin
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(68, 44), # via.drawing
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(81, 4), # areaid.standardc
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(70, 20), # met3.drawing
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]
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scramble_cells = None
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mux_config_yaml_name = "sky130.yaml"
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mux_macros = [
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"pg/sky130/tt_pg_1v8_hp_1",
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"pg/sky130/tt_pg_1v8_hp_2",
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"pg/sky130/tt_pg_1v8_hp_4",
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"pg/sky130/tt_pg_1v8_ll_1",
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"pg/sky130/tt_pg_1v8_ll_2",
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"pg/sky130/tt_pg_1v8_ll_4",
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"pg/sky130/tt_pg_3v3_2",
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"asw/sky130/tt_asw_3v3",
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]
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extra_logo_macros = []
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prboundary_layer = (235, 4) # prBoundary.boundary
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logo_layer = (71, 20) # met4.drawing
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logo_layer_name = "met4"
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logo_pixel_size = 0.5 # um
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def read_pdk_version(self, pdk_root: str) -> PDKVersionInfo:
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pdk_sources_file = os.path.join(pdk_root, "sky130A", "SOURCES")
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return parse_openpdks_pdk_version(pdk_sources_file)
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def load_cell_definitions(self) -> Dict[str, CellDefinition]:
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URL_FORMAT = "https://skywater-pdk.readthedocs.io/en/main/contents/libraries/sky130_fd_sc_hd/cells/{name}/README.html"
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script_dir = os.path.dirname(os.path.realpath(__file__))
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with open(os.path.join(script_dir, "tech/sky130A/cells.json")) as fh:
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cells = json.load(fh)
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for name, cell in cells.items():
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cell["url"] = URL_FORMAT.format(name=name)
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return cells
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class IHPTech(Tech):
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def_suffix = "pgvdd"
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librelane_pdk_args = "--pdk ihp-sg13g2"
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tt_corner = "nom_typ_1p20V_25C"
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cell_regexp = r"^\s*sg13g2_(?P<cell_name>\S+)_(?P<cell_drive>\d+)"
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netlist_type = "nl"
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project_top_metal_layer = "TopMetal1"
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librelane_config = {}
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label_layers = [
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(8, 1), # Metal1.label
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(8, 25), # Metal1.text
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(67, 25), # Metal5.text
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(126, 25), # TopMetal1.text
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]
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buried_layers = [
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(6, 0), # Cont.drawing
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(8, 2), # Metal1.pin
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(19, 0), # Via1.drawing
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(51, 0), # HeatTrans.drawing
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(189, 4), # prBoundary.boundary
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]
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scramble_cells = "sg13g2_"
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mux_config_yaml_name = "ihp-sg13g2.yaml"
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mux_macros = [
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"pg/ihp-sg13g2/tt_pg_1v5_hp_1",
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"pg/ihp-sg13g2/tt_pg_1v5_hp_2",
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"pg/ihp-sg13g2/tt_pg_1v5_hp_4",
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"pg/ihp-sg13g2/tt_pg_1v5_ll_1",
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"pg/ihp-sg13g2/tt_pg_1v5_ll_2",
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"pg/ihp-sg13g2/tt_pg_1v5_ll_4",
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]
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extra_logo_macros = [
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"tech/ihp-sg13g2/tt_logo_corner",
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]
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prboundary_layer = (189, 4) # prBoundary.boundary
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logo_layer = (67, 0) # Metal5.drawing
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logo_layer_name = "Metal5"
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logo_pixel_size = 0.25 # um
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def read_pdk_version(self, pdk_root: str) -> PDKVersionInfo:
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pdk_sources_file = os.path.join(pdk_root, "ihp-sg13g2", "SOURCES")
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return parse_openpdks_pdk_version(pdk_sources_file, "IHP-Open-PDK")
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def load_cell_definitions(self) -> Dict[str, CellDefinition]:
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URL_FORMAT = "https://raw.githubusercontent.com/IHP-GmbH/IHP-Open-PDK/refs/heads/main/ihp-sg13g2/libs.ref/sg13g2_stdcell/doc/sg13g2_stdcell_typ_1p20V_25C.pdf#{ref}"
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script_dir = os.path.dirname(os.path.realpath(__file__))
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with open(os.path.join(script_dir, "tech/ihp-sg13g2/cells.json")) as fh:
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cells = json.load(fh)
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for cell in cells.values():
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cell["url"] = URL_FORMAT.format(ref=cell["doc_ref"])
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return cells
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class GF180MCUDTech(Tech):
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def_suffix = "pgvdd"
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librelane_pdk_args = "--pdk gf180mcuD"
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tt_corner = "nom_tt_025C_3v30"
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cell_regexp = (
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r"^\s*gf180mcu_(?P<cell_lib>\S+)__(?P<cell_name>\S+)_(?P<cell_drive>\d+)"
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)
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netlist_type = "pnl"
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project_top_metal_layer = "Metal4"
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librelane_config = {
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# The default configuration is for a 5V supply, but TT targets a 3.3V supply,
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# so we need to adjust the library paths to use the 3.3V libraries.
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"VDD_PIN_VOLTAGE": 3.3,
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"LIB_SYNTH": "pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__tt_025C_3v30.lib",
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"LIB_FASTEST": "pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_3v60.lib",
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"LIB_SLOWEST": "pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ss_125C_3v00.lib",
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"DEFAULT_CORNER": "nom_tt_025C_3v30",
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"STA_CORNERS": [
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"nom_tt_025C_3v30",
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"nom_ss_125C_3v00",
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"nom_ff_n40C_3v60",
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"min_tt_025C_3v30",
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"min_ss_125C_3v00",
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"min_ff_n40C_3v60",
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"max_tt_025C_3v30",
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"max_ss_125C_3v00",
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"max_ff_n40C_3v60",
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],
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"LIB": {
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"*_tt_025C_3v30": [
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"pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__tt_025C_3v30.lib"
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],
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"*_ss_125C_3v00": [
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"pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ss_125C_3v00.lib"
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],
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"*_ff_n40C_3v60": [
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"pdk_dir::libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_3v60.lib"
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],
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},
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}
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label_layers = [
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# TODO: add label layers
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]
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buried_layers = [
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# TODO: add buried layers
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]
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scramble_cells = "gf180mcu_fd_sc_"
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mux_config_yaml_name = "gf180mcuD.yaml"
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mux_macros = [
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# Currently none
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]
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extra_logo_macros = []
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prboundary_layer = (0, 0) # PR_bndry
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logo_layer = (46, 0) # Metal4
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logo_layer_name = "Metal4"
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logo_pixel_size = 0.5 # um
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def read_pdk_version(self, pdk_root: str) -> PDKVersionInfo:
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pdk_sources_file = os.path.join(pdk_root, "gf180mcuD", "SOURCES")
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return parse_openpdks_pdk_version(pdk_sources_file)
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def load_cell_definitions(self) -> Dict[str, CellDefinition]:
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URL_FORMAT = "https://gf180mcu-pdk.readthedocs.io/en/latest/digital/standard_cells/gf180mcu_fd_sc_mcu7t5v0/cells/{name}/gf180mcu_fd_sc_mcu7t5v0__{name}{variant}.html"
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script_dir = os.path.dirname(os.path.realpath(__file__))
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with open(os.path.join(script_dir, "tech/gf180mcuD/cells.json")) as fh:
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cells = json.load(fh)
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for name, cell in cells.items():
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variant = cell["variants"][0] if cell["variants"] else ""
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cell["url"] = URL_FORMAT.format(name=name, variant=variant)
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return cells
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tech_map: dict[TechName, Tech] = {
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"ihp-sg13g2": IHPTech(),
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"gf180mcuD": GF180MCUDTech(),
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"sky130A": Sky130Tech(),
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}
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