Files
tt-support-tools/precheck/tech-files

sky130A_mr.drc from https://github.com/chipfoundry/mpw_precheck revision 3467a4c8252aa884cddc7d3f73370df9744dd65e
pin_label_purposes_overlapping_drawing.rb.drc from https://github.com/chipfoundry/mpw_precheck revision f6b9c3d3f00694f96dce8444149449b4719180f0
zeroarea.rb.drc from https://github.com/chipfoundry/mpw_precheck revision 4fd5283b124e931c9e71219f47270075176f84e2
nwell_urpm.drc from https://open-source-silicon.slack.com/archives/C05FW1VMY5A/p1729112262642699?thread_ts=1728921677.220509&cid=C05FW1VMY5A

sg13g2_mr.lydrc:
  from https://github.com/IHP-GmbH/TO_Apr2025 revision 772a369f3ceabc2c6e1eba57d91ae755682c8323
  with the following minimum density rules disabled:
  - M1.j, M2.j, M3.j, M4.j, M5.j
  - M1Fil.h, M2Fil.h, M3Fil.h, M4Fil.h, M5Fil.h