refactor(tt_tool): openlane2 -> librelane

README.md

@@ -23,6 +23,6 @@ pre-commit install
 
 ## Configuration
 
-* creates a little TCL shim that tells OpenLane where the source is and the name of the top module
+* creates a little TCL shim that tells LibreLane where the source is and the name of the top module
 * makes sure the top module is not called 'top'
-* if you have OpenLane installed locally, then you can harden the design with --harden
+* if you have LibreLane installed locally, then you can harden the design with --harden

project.py

@@ -523,7 +523,7 @@ class Project:
         arg_progress = "--hide-progress-bar" if "CI" in os.environ else ""
         arg_pdk_root = '--pdk-root "$PDK_ROOT"' if "PDK_ROOT" in os.environ else ""
         arg_pdk = "--manual-pdk --pdk ihp-sg13g2" if self.ihp else ""
-        harden_cmd = f"python -m openlane {arg_pdk_root} --docker-no-tty --dockerized {arg_pdk_root} {arg_pdk} --run-tag wokwi --force-run-dir runs/wokwi {arg_progress} src/config_merged.json"
+        harden_cmd = f"python -m librelane {arg_pdk_root} --docker-no-tty --dockerized {arg_pdk_root} {arg_pdk} --run-tag wokwi --force-run-dir runs/wokwi {arg_progress} src/config_merged.json"
         env = os.environ.copy()
         logging.debug(harden_cmd)
         p = subprocess.run(harden_cmd, shell=True, env=env)
@@ -548,7 +548,7 @@ class Project:
 
         resolved_json_path = "runs/wokwi/resolved.json"
         config = json.load(open(os.path.join(self.local_dir, resolved_json_path)))
-        openlane_version = config["meta"]["openlane_version"]
+        librelane_version = config["meta"]["librelane_version"]
         if self.ihp:
             pdk_repo = Repo(env["PDK_ROOT"])
             pdk_repo_name = list(pdk_repo.remotes[0].urls)[0].split("/")[-1]
@@ -559,9 +559,7 @@ class Project:
                 config["PDK_ROOT"], config["PDK"], "SOURCES"
             )
             pdk_sources = open(pdk_sources_file).read()
-        open("runs/wokwi/OPENLANE_VERSION", "w").write(
+        open("runs/wokwi/FLOW_VERSION", "w").write(f"LibreLane {librelane_version}\n")
-            f"OpenLane2 {openlane_version}\n"
-        )
         open("runs/wokwi/PDK_SOURCES", "w").write(pdk_sources)
         if not self.ihp:
             volare.enable(
@@ -572,12 +570,6 @@ class Project:
 
         os.chdir(cwd)
 
-    def run_drc(self):
-        logging.warning("DRC is already included in OpenLane hardening job, skipping")
-
-    def run_lvs(self):
-        logging.warning("LVS is already included in OpenLane hardening job, skipping")
-
     def create_fpga_bitstream(self, args):
         logging.info(f"Creating FPGA bitstream for {self}")
 
@@ -1009,7 +1001,7 @@ class Project:
 
         return num_cells
 
-    # Parse the lib, cell and drive strength an OpenLane gate-level Verilog file
+    # Parse the lib, cell and drive strength an LibreLane gate-level Verilog file
     def get_cell_counts_from_gl(self):
         cell_count: typing.Dict[str, int] = {}
         total = 0

tt_tool.py

@@ -19,13 +19,6 @@ if __name__ == "__main__":
         const=logging.DEBUG,
         default=logging.INFO,
     )
-    parser.add_argument(
-        "--openlane2",
-        help="use openlane 2",
-        action="store_const",
-        const=True,
-        default=True,
-    )
     parser.add_argument(
         "--ihp",
         help="use IHP PDK",
@@ -106,7 +99,7 @@ if __name__ == "__main__":
     )
     parser.add_argument(
         "--harden",
-        help="use a local OpenLane install to harden the project",
+        help="use a local LibreLane install to harden the project",
         action="store_const",
         const=True,
     )