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Merge pull request #119 from TinyTapeout/gf180mcu

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Initial support for the gf180mcuD PDK (with wafer.space)
This commit is contained in:
Uri Shaked
2025-09-29 20:26:35 +03:00
committed by GitHub
parent 44d164955d 1b336f4996
commit 65b404f80a
15 changed files with 5342 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/workflows/test-harden.yaml
+9 -4
View File
@@ -10,7 +10,7 @@ jobs:
strategy: strategy:
fail-fast: false fail-fast: false
matrix: matrix:
pdk: [sky130A, ihp-sg13g2] pdk: [sky130A, ihp-sg13g2, gf180mcuD]
runs-on: ubuntu-24.04 runs-on: ubuntu-24.04
@@ -43,8 +43,8 @@ jobs:
if: "${{ matrix.pdk == 'ihp-sg13g2' }}" if: "${{ matrix.pdk == 'ihp-sg13g2' }}"
run: pip install librelane==${LIBRELANE_VERSION_DEV} run: pip install librelane==${LIBRELANE_VERSION_DEV}
- name: Clone the factory test (sky130A) - name: Clone the factory test
if: "${{ matrix.pdk == 'sky130A' }}" if: "${{ matrix.pdk != 'ihp-sg13g2' }}"
run: git clone https://github.com/tinytapeout/ttsky25a-factory-test ${PROJECT_DIR} run: git clone https://github.com/tinytapeout/ttsky25a-factory-test ${PROJECT_DIR}
- name: Clone the factory test (ihp-sg13g2) - name: Clone the factory test (ihp-sg13g2)
@@ -55,10 +55,14 @@ jobs:
if: "${{ matrix.pdk == 'ihp-sg13g2' }}" if: "${{ matrix.pdk == 'ihp-sg13g2' }}"
run: git clone -b tt2025 --depth 1 https://github.com/TinyTapeout/IHP-Open-PDK ${PDK_ROOT} run: git clone -b tt2025 --depth 1 https://github.com/TinyTapeout/IHP-Open-PDK ${PDK_ROOT}
- name: Configure tt_tool.py args - name: Configure tt_tool.py args (IHP)
if: "${{ matrix.pdk == 'ihp-sg13g2' }}" if: "${{ matrix.pdk == 'ihp-sg13g2' }}"
run: echo "TT_TOOL_ARGS=--ihp" >> $GITHUB_ENV run: echo "TT_TOOL_ARGS=--ihp" >> $GITHUB_ENV
- name: Configure tt_tool.py args (gf180mcuD)
if: "${{ matrix.pdk == 'gf180mcuD' }}"
run: echo "TT_TOOL_ARGS=--gf" >> $GITHUB_ENV
- name: Copy tt-support-tools to the project directory - name: Copy tt-support-tools to the project directory
run: cp -r . ${PROJECT_DIR}/tt run: cp -r . ${PROJECT_DIR}/tt
@@ -77,6 +81,7 @@ jobs:
- name: Print stats - name: Print stats
working-directory: ${{ env.PROJECT_DIR }} working-directory: ${{ env.PROJECT_DIR }}
run: | run: |
set -e
python ./tt/tt_tool.py $TT_TOOL_ARGS --print-stats --print-warnings --print-cell-summary --print-cell-category | tee $GITHUB_STEP_SUMMARY python ./tt/tt_tool.py $TT_TOOL_ARGS --print-stats --print-warnings --print-cell-summary --print-cell-category | tee $GITHUB_STEP_SUMMARY
- name: Create SVG render - name: Create SVG render
project.py
+2 -2
View File
@@ -488,6 +488,8 @@ class Project:
"VERILOG_FILES": [f"dir::{src}" for src in self.sources], "VERILOG_FILES": [f"dir::{src}" for src in self.sources],
"DIE_AREA": die_area, "DIE_AREA": die_area,
"FP_DEF_TEMPLATE": def_template, "FP_DEF_TEMPLATE": def_template,
"VDD_PIN": "VPWR",
"GND_PIN": "VGND",
"RT_MAX_LAYER": self.tech.project_top_metal_layer, "RT_MAX_LAYER": self.tech.project_top_metal_layer,
} }
write_config(config, os.path.join(self.src_dir, "user_config"), ("json",)) write_config(config, os.path.join(self.src_dir, "user_config"), ("json",))
@@ -992,9 +994,7 @@ class Project:
if m is not None: if m is not None:
total += 1 total += 1
gd = m.groupdict() gd = m.groupdict()
cell_lib = gd.get("cell_lib", "")
cell_name = gd["cell_name"] cell_name = gd["cell_name"]
assert cell_lib in ["fd_sc_hd", "ef_sc_hd", ""]
try: try:
cell_count[cell_name] += 1 cell_count[cell_name] += 1
except KeyError: except KeyError:
tech.py
+42 -2
View File
@@ -4,7 +4,7 @@ from typing import Dict, List, Literal, Protocol, Tuple, TypedDict
from git.repo import Repo from git.repo import Repo
TechName = Literal["sky130A", "ihp-sg13g2"] TechName = Literal["sky130A", "ihp-sg13g2", "gf180mcuD"]
class CellDefinition(TypedDict): class CellDefinition(TypedDict):
@@ -150,7 +150,47 @@ class IHPTech(Tech):
return cells return cells
class GF180MCUDTech(Tech):
def_suffix = "pgvdd"
librelane_pdk_args = "--pdk gf180mcuD"
tt_corner = "nom_tt_025C_5v00"
cell_regexp = r"gf180mcu_(?P<cell_lib>\S+)__(?P<cell_name>\S+)_(?P<cell_drive>\d+)"
netlist_type = "pnl"
project_top_metal_layer = "Metal4"
label_layers = [
# TODO: add label layers
]
buried_layers = [
# TODO: add buried layers
]
mux_config_yaml_name = "gf180mcuD.yaml"
mux_macros = [
"pg/gf180mcuD/tt_pg_1v8_hp_1",
"pg/gf180mcuD/tt_pg_1v8_hp_2",
"pg/gf180mcuD/tt_pg_1v8_hp_4",
"pg/gf180mcuD/tt_pg_1v8_ll_1",
"pg/gf180mcuD/tt_pg_1v8_ll_2",
"pg/gf180mcuD/tt_pg_1v8_ll_4",
]
extra_logo_macros = []
def read_pdk_version(self, pdk_root: str) -> PDKVersionInfo:
pdk_sources_file = os.path.join(pdk_root, "gf180mcuD", "SOURCES")
return parse_openpdks_pdk_version(pdk_sources_file)
def load_cell_definitions(self) -> Dict[str, CellDefinition]:
URL_FORMAT = "https://gf180mcu-pdk.readthedocs.io/en/latest/digital/standard_cells/gf180mcu_fd_sc_mcu7t5v0/cells/{name}/gf180mcu_fd_sc_mcu7t5v0__{name}{variant}.html"
script_dir = os.path.dirname(os.path.realpath(__file__))
with open(os.path.join(script_dir, "tech/gf180mcuD/cells.json")) as fh:
cells = json.load(fh)
for name, cell in cells.items():
variant = cell["variants"][0] if cell["variants"] else ""
cell["url"] = URL_FORMAT.format(name=name, variant=variant)
return cells
tech_map: dict[TechName, Tech] = { tech_map: dict[TechName, Tech] = {
"sky130A": Sky130Tech(),
"ihp-sg13g2": IHPTech(), "ihp-sg13g2": IHPTech(),
"gf180mcuD": GF180MCUDTech(),
"sky130A": Sky130Tech(),
} }
tech/gf180mcuD/categories.json
+91
View File
@@ -0,0 +1,91 @@
{
"categories": [
"AND",
"OR",
"NAND",
"NOR",
"Clock",
"Flip Flops",
"Multiplexer",
"Latch",
"Inverter",
"Buffer",
"Fill",
"Tap",
"Diode",
"Combo Logic",
"Misc",
"Adder"
],
"map": {
"addf": 15,
"addh": 15,
"and2": 0,
"and3": 0,
"and4": 0,
"antenna": 12,
"aoi21": 13,
"aoi211": 13,
"aoi22": 13,
"aoi221": 13,
"aoi222": 13,
"buf": 9,
"bufz": 14,
"clkbuf": 9,
"clkinv": 4,
"dffnq": 5,
"dffnrnq": 5,
"dffnrsnq": 5,
"dffnsnq": 5,
"dffq": 5,
"dffrnq": 5,
"dffrsnq": 5,
"dffsnq": 5,
"dlya": 9,
"dlyb": 9,
"dlyc": 9,
"dlyd": 9,
"endcap": 14,
"fill": 10,
"fillcap": 10,
"filltie": 10,
"hold": 14,
"icgtn": 4,
"icgtp": 4,
"inv": 8,
"invz": 8,
"latq": 7,
"latrnq": 7,
"latrsnq": 7,
"latsnq": 7,
"mux2": 6,
"mux4": 6,
"nand2": 2,
"nand3": 2,
"nand4": 2,
"nor2": 3,
"nor3": 3,
"nor4": 3,
"oai21": 13,
"oai211": 13,
"oai22": 13,
"oai221": 13,
"oai222": 13,
"oai31": 13,
"oai32": 13,
"oai33": 13,
"or2": 1,
"or3": 1,
"or4": 1,
"sdffq": 5,
"sdffrnq": 5,
"sdffrsnq": 5,
"sdffsnq": 5,
"tieh": 14,
"tiel": 14,
"xnor2": 3,
"xnor3": 3,
"xor2": 1,
"xor3": 1
}
}
tech/gf180mcuD/cells.json
+3510
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File diff suppressed because it is too large Load Diff
tech/gf180mcuD/def/tt_block_1x1_pgvdd.def
+232
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@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 693280 321440 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 320440 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 320440 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 320440 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 320440 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 320440 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 320440 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 320440 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 320440 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 320440 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 320440 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 320440 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 320440 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 320440 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 320440 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 320440 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 320440 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 320440 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 320440 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 320440 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 320440 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 320440 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 320440 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 320440 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 320440 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 320440 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 320440 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 320440 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 320440 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 320440 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 320440 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 320440 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 320440 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 320440 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 320440 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 320440 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 320440 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 320440 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 320440 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 320440 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 320440 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 320440 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 320440 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 320440 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_1x2_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 693280 650720 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 649720 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 649720 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 649720 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 649720 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 649720 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 649720 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 649720 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 649720 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 649720 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 649720 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 649720 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 649720 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 649720 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 649720 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 649720 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 649720 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 649720 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 649720 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 649720 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 649720 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 649720 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 649720 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 649720 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 649720 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 649720 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 649720 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 649720 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 649720 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 649720 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 649720 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 649720 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 649720 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 649720 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 649720 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 649720 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 649720 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 649720 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 649720 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 649720 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 649720 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 649720 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 649720 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 649720 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_2x2_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 1422400 650720 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 649720 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 649720 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 649720 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 649720 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 649720 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 649720 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 649720 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 649720 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 649720 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 649720 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 649720 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 649720 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 649720 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 649720 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 649720 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 649720 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 649720 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 649720 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 649720 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 649720 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 649720 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 649720 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 649720 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 649720 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 649720 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 649720 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 649720 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 649720 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 649720 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 649720 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 649720 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 649720 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 649720 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 649720 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 649720 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 649720 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 649720 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 649720 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 649720 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 649720 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 649720 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 649720 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 649720 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_3x2_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 2151520 650720 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 649720 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 649720 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 649720 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 649720 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 649720 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 649720 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 649720 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 649720 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 649720 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 649720 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 649720 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 649720 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 649720 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 649720 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 649720 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 649720 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 649720 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 649720 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 649720 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 649720 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 649720 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 649720 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 649720 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 649720 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 649720 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 649720 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 649720 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 649720 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 649720 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 649720 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 649720 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 649720 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 649720 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 649720 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 649720 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 649720 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 649720 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 649720 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 649720 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 649720 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 649720 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 649720 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 649720 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_3x4_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 2151520 1473920 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 1472920 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 1472920 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 1472920 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 1472920 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 1472920 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 1472920 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 1472920 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 1472920 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 1472920 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 1472920 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 1472920 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 1472920 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 1472920 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 1472920 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 1472920 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 1472920 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 1472920 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 1472920 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 1472920 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 1472920 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 1472920 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 1472920 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 1472920 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 1472920 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 1472920 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 1472920 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 1472920 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 1472920 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 1472920 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 1472920 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 1472920 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 1472920 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 1472920 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 1472920 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 1472920 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 1472920 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 1472920 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 1472920 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 1472920 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 1472920 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 1472920 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 1472920 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 1472920 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_4x2_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 2880640 650720 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 649720 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 649720 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 649720 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 649720 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 649720 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 649720 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 649720 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 649720 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 649720 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 649720 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 649720 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 649720 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 649720 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 649720 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 649720 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 649720 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 649720 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 649720 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 649720 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 649720 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 649720 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 649720 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 649720 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 649720 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 649720 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 649720 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 649720 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 649720 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 649720 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 649720 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 649720 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 649720 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 649720 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 649720 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 649720 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 649720 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 649720 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 649720 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 649720 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 649720 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 649720 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 649720 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 649720 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/def/tt_block_4x4_pgvdd.def
+232
View File
@@ -0,0 +1,232 @@
VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 2000 ;
DIEAREA ( 0 0 ) ( 2880640 1473920 ) ;
COMPONENTS 0 ;
END COMPONENTS
PINS 43 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 626080 1472920 ) N ;
- ena + NET ena + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 640640 1472920 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 611520 1472920 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 596960 1472920 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 582400 1472920 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 567840 1472920 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 553280 1472920 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 538720 1472920 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 524160 1472920 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 509600 1472920 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 495040 1472920 ) N ;
- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 480480 1472920 ) N ;
- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 465920 1472920 ) N ;
- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 451360 1472920 ) N ;
- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 436800 1472920 ) N ;
- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 422240 1472920 ) N ;
- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 407680 1472920 ) N ;
- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 393120 1472920 ) N ;
- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 378560 1472920 ) N ;
- uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 131040 1472920 ) N ;
- uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 116480 1472920 ) N ;
- uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 101920 1472920 ) N ;
- uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 87360 1472920 ) N ;
- uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 72800 1472920 ) N ;
- uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 58240 1472920 ) N ;
- uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 43680 1472920 ) N ;
- uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 29120 1472920 ) N ;
- uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 247520 1472920 ) N ;
- uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 232960 1472920 ) N ;
- uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 218400 1472920 ) N ;
- uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 203840 1472920 ) N ;
- uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 189280 1472920 ) N ;
- uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 174720 1472920 ) N ;
- uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 160160 1472920 ) N ;
- uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 145600 1472920 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 364000 1472920 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 349440 1472920 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 334880 1472920 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 320320 1472920 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 305760 1472920 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 291200 1472920 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 276640 1472920 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER Metal4 ( -300 -1000 ) ( 300 1000 )
+ PLACED ( 262080 1472920 ) N ;
END PINS
SPECIALNETS 2 ;
- VDD + USE POWER ;
- VSS + USE GROUND ;
END SPECIALNETS
NETS 43 ;
- clk ( PIN clk ) + USE SIGNAL ;
- ena ( PIN ena ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN
tech/gf180mcuD/gf180mcu_cell_defs.py
+49
View File
@@ -0,0 +1,49 @@
# Create a JSON file with cell definitions from the gf180mcu_fd_sc_mcu7t5v0 standard cell library.
# To run this script, first clone the standard cell library by running:
#
# git clone --depth 1 https://github.com/google/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0 gf180mcu_fd_sc_mcu7t5v0
import glob
import json
import os
from typing import Dict, List, TypedDict
class GF180Cell(TypedDict):
description: str
file_prefix: str
library: str
name: str
parameters: List[str]
ports: List[List[str]] # kind, name, direction, description
type: str
verilog_name: str
"""
Each variant is a different drive strength (e.g. _1, _2, _4, etc.).
Cells with a single drive strength have the empty string as variant.
"""
variants: List[str]
def create_cell_defs():
json_files = glob.glob("gf180mcu_fd_sc_mcu7t5v0/cells/*/definition.json")
definitions: Dict[str, GF180Cell] = {}
for json_file in json_files:
with open(json_file) as fh:
definition: GF180Cell = json.load(fh)
definitions[definition["name"]] = definition
variants = []
for item in os.listdir(os.path.dirname(json_file)):
if item.startswith(definition["file_prefix"]) and item.endswith(".gds"):
variants.append(item[len(definition["file_prefix"]) : -4])
variants.sort()
definition["variants"] = variants
print(definition["name"], variants)
script_dir = os.path.dirname(os.path.realpath(__file__))
with open(f"{script_dir}/cells.json", "w") as fh:
json.dump(definitions, fh, indent=2)
if __name__ == "__main__":
create_cell_defs()
tech/gf180mcuD/tile_sizes.yaml
+7
View File
@@ -0,0 +1,7 @@
1x1: "0 0 346.64 160.72"
1x2: "0 0 346.64 325.36"
2x2: "0 0 711.20 325.36"
3x2: "0 0 1075.76 325.36"
3x4: "0 0 1075.76 736.96"
4x2: "0 0 1440.32 325.36"
4x4: "0 0 1440.32 736.96"
tt_tool.py
+8 -1
View File
@@ -27,6 +27,13 @@ if __name__ == "__main__":
const=True, const=True,
default=False, default=False,
) )
parser.add_argument(
"--gf",
help="use gf180mcuD PDK",
action="store_const",
const=True,
default=False,
)
# reports & summaries # reports & summaries
parser.add_argument( parser.add_argument(
@@ -147,7 +154,7 @@ if __name__ == "__main__":
ch.setFormatter(log_format) ch.setFormatter(log_format)
log.addHandler(ch) log.addHandler(ch)
pdk: TechName = "ihp-sg13g2" if args.ihp else "sky130A" pdk: TechName = "ihp-sg13g2" if args.ihp else "gf180mcuD" if args.gf else "sky130A"
project = Project(0, "unknown", args.project_dir, pdk, is_user_project=True) project = Project(0, "unknown", args.project_dir, pdk, is_user_project=True)
project.post_clone_setup() project.post_clone_setup()