Uri Shaked
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0a5eadaf88
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style(rom): format verilog code with verible
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2025-03-30 12:15:44 +03:00 |
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Uri Shaked
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cbbf76df98
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feat(rom): ihp hardening support
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2024-10-21 10:09:05 +03:00 |
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Uri Shaked
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17e08942b2
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feat(rom): add Magic and CRC32 fields
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2024-05-29 16:18:08 +03:00 |
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Uri Shaked
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66e1fc3ff0
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feat: update tt_block def files for tt06
The tile sizes have slightly changed as we plan using the openframe caravel variant, as well as power gating all the projects on the shuttle.
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2023-12-31 23:58:59 +02:00 |
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Uri Shaked
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6702774d07
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feat(rom): update config for latest OpenLane 2
DIE_AREA should be a list of numbers and not a string
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2023-11-20 14:57:41 +02:00 |
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Uri Shaked
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23da39ba14
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feat: include chip ROM when running in verification mode (--test)
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2023-09-11 15:35:24 +03:00 |
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Uri Shaked
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cadbfbcd25
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feat: Chip ROM auto generation with OpenLane 2
So we can generate the ROM while building the shuttle's GDS
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2023-09-10 20:17:58 +03:00 |
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