mirror of
https://github.com/TinyTapeout/tt-support-tools.git
synced 2026-11-03 04:36:09 +01:00
Uri Shaked
562ebd4f93
to support tt-multiplexer with power gating. built from tt-multiplexer commit dfbcff452131ea42631f9e358687c22776daffdc
265 lines
11 KiB
Modula-2
265 lines
11 KiB
Modula-2
VERSION 5.8 ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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DESIGN tt_um_template ;
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UNITS DISTANCE MICRONS 1000 ;
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DIEAREA ( 0 0 ) ( 168360 111520 ) ;
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ROW ROW_0 unithd 2760 2720 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_1 unithd 2760 5440 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_2 unithd 2760 8160 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_3 unithd 2760 10880 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_4 unithd 2760 13600 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_5 unithd 2760 16320 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_6 unithd 2760 19040 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_7 unithd 2760 21760 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_8 unithd 2760 24480 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_9 unithd 2760 27200 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_10 unithd 2760 29920 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_11 unithd 2760 32640 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_12 unithd 2760 35360 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_13 unithd 2760 38080 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_14 unithd 2760 40800 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_15 unithd 2760 43520 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_16 unithd 2760 46240 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_17 unithd 2760 48960 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_18 unithd 2760 51680 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_19 unithd 2760 54400 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_20 unithd 2760 57120 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_21 unithd 2760 59840 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_22 unithd 2760 62560 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_23 unithd 2760 65280 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_24 unithd 2760 68000 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_25 unithd 2760 70720 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_26 unithd 2760 73440 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_27 unithd 2760 76160 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_28 unithd 2760 78880 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_29 unithd 2760 81600 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_30 unithd 2760 84320 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_31 unithd 2760 87040 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_32 unithd 2760 89760 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_33 unithd 2760 92480 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_34 unithd 2760 95200 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_35 unithd 2760 97920 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_36 unithd 2760 100640 N DO 354 BY 1 STEP 460 0 ;
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ROW ROW_37 unithd 2760 103360 FS DO 354 BY 1 STEP 460 0 ;
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ROW ROW_38 unithd 2760 106080 N DO 354 BY 1 STEP 460 0 ;
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TRACKS X 230 DO 366 STEP 460 LAYER li1 ;
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TRACKS Y 170 DO 328 STEP 340 LAYER li1 ;
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TRACKS X 170 DO 495 STEP 340 LAYER met1 ;
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TRACKS Y 170 DO 328 STEP 340 LAYER met1 ;
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TRACKS X 230 DO 366 STEP 460 LAYER met2 ;
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TRACKS Y 230 DO 242 STEP 460 LAYER met2 ;
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TRACKS X 340 DO 247 STEP 680 LAYER met3 ;
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TRACKS Y 340 DO 164 STEP 680 LAYER met3 ;
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TRACKS X 460 DO 183 STEP 920 LAYER met4 ;
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TRACKS Y 460 DO 121 STEP 920 LAYER met4 ;
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TRACKS X 1700 DO 49 STEP 3400 LAYER met5 ;
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TRACKS Y 1700 DO 33 STEP 3400 LAYER met5 ;
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COMPONENTS 1 ;
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- TIE_ZERO_zero_ sky130_fd_sc_hd__conb_1 ;
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END COMPONENTS
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PINS 43 ;
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- clk + NET clk + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 145820 111020 ) N ;
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- ena + NET ena + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 148580 111020 ) N ;
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- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 143060 111020 ) N ;
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- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 140300 111020 ) N ;
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- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 137540 111020 ) N ;
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- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 134780 111020 ) N ;
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- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 132020 111020 ) N ;
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- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 129260 111020 ) N ;
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- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 126500 111020 ) N ;
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- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 123740 111020 ) N ;
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- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 120980 111020 ) N ;
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- uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 118220 111020 ) N ;
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- uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 115460 111020 ) N ;
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- uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 112700 111020 ) N ;
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- uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 109940 111020 ) N ;
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- uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 107180 111020 ) N ;
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- uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 104420 111020 ) N ;
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- uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 101660 111020 ) N ;
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- uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 98900 111020 ) N ;
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- uio_oe[0] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 51980 111020 ) N ;
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- uio_oe[1] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 49220 111020 ) N ;
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- uio_oe[2] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 46460 111020 ) N ;
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- uio_oe[3] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 43700 111020 ) N ;
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- uio_oe[4] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 40940 111020 ) N ;
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- uio_oe[5] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 38180 111020 ) N ;
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- uio_oe[6] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 35420 111020 ) N ;
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- uio_oe[7] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 32660 111020 ) N ;
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- uio_out[0] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 74060 111020 ) N ;
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- uio_out[1] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 71300 111020 ) N ;
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- uio_out[2] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 68540 111020 ) N ;
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- uio_out[3] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 65780 111020 ) N ;
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- uio_out[4] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 63020 111020 ) N ;
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- uio_out[5] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 60260 111020 ) N ;
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- uio_out[6] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 57500 111020 ) N ;
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- uio_out[7] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 54740 111020 ) N ;
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- uo_out[0] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 96140 111020 ) N ;
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- uo_out[1] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 93380 111020 ) N ;
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- uo_out[2] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 90620 111020 ) N ;
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- uo_out[3] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 87860 111020 ) N ;
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- uo_out[4] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 85100 111020 ) N ;
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- uo_out[5] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 82340 111020 ) N ;
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- uo_out[6] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 79580 111020 ) N ;
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- uo_out[7] + NET zero_ + DIRECTION OUTPUT + USE SIGNAL
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+ PORT
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+ LAYER met4 ( -150 -500 ) ( 150 500 )
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+ PLACED ( 76820 111020 ) N ;
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END PINS
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SPECIALNETS 2 ;
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- VGND ( TIE_ZERO_zero_ VNB ) ( TIE_ZERO_zero_ VGND ) + USE GROUND ;
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- VPWR ( TIE_ZERO_zero_ VPB ) ( TIE_ZERO_zero_ VPWR ) + USE POWER ;
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END SPECIALNETS
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NETS 20 ;
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- clk ( PIN clk ) + USE SIGNAL ;
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- ena ( PIN ena ) + USE SIGNAL ;
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- rst_n ( PIN rst_n ) + USE SIGNAL ;
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- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
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- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
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- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
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- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
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- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
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- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
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- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
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- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
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- uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
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- uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
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- uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
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- uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
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- uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
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- uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
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- uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
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- uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
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- zero_ ( PIN uo_out[7] ) ( PIN uo_out[6] ) ( PIN uo_out[5] ) ( PIN uo_out[4] ) ( PIN uo_out[3] ) ( PIN uo_out[2] ) ( PIN uo_out[1] )
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( PIN uo_out[0] ) ( PIN uio_out[7] ) ( PIN uio_out[6] ) ( PIN uio_out[5] ) ( PIN uio_out[4] ) ( PIN uio_out[3] ) ( PIN uio_out[2] ) ( PIN uio_out[1] )
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( PIN uio_out[0] ) ( PIN uio_oe[7] ) ( PIN uio_oe[6] ) ( PIN uio_oe[5] ) ( PIN uio_oe[4] ) ( PIN uio_oe[3] ) ( PIN uio_oe[2] ) ( PIN uio_oe[1] )
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( PIN uio_oe[0] ) ( TIE_ZERO_zero_ LO ) + USE SIGNAL ;
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END NETS
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END DESIGN
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