Files
tt-support-tools/def/tt_block_micro.def
Uri Shaked 894bc331f1 fix(def): move micro template pins to metal2
We restrict micro projects to only use metal layers up to metal2, in order to simplify integration.
2024-09-05 13:22:34 +03:00

137 lines
5.3 KiB
Modula-2

VERSION 5.8 ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN tt_um_template ;
UNITS DISTANCE MICRONS 1000 ;
DIEAREA ( 0 0 ) ( 65000 50000 ) ;
ROW ROW_0 unithd 2760 2720 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_1 unithd 2760 5440 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_2 unithd 2760 8160 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_3 unithd 2760 10880 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_4 unithd 2760 13600 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_5 unithd 2760 16320 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_6 unithd 2760 19040 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_7 unithd 2760 21760 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_8 unithd 2760 24480 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_9 unithd 2760 27200 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_10 unithd 2760 29920 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_11 unithd 2760 32640 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_12 unithd 2760 35360 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_13 unithd 2760 38080 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_14 unithd 2760 40800 N DO 71 BY 1 STEP 460 0 ;
ROW ROW_15 unithd 2760 43520 FS DO 71 BY 1 STEP 460 0 ;
ROW ROW_16 unithd 2760 46240 N DO 71 BY 1 STEP 460 0 ;
TRACKS X 230 DO 350 STEP 460 LAYER li1 ;
TRACKS Y 170 DO 328 STEP 340 LAYER li1 ;
TRACKS X 170 DO 473 STEP 340 LAYER met1 ;
TRACKS Y 170 DO 328 STEP 340 LAYER met1 ;
TRACKS X 230 DO 350 STEP 460 LAYER met2 ;
TRACKS Y 230 DO 242 STEP 460 LAYER met2 ;
TRACKS X 340 DO 237 STEP 680 LAYER met3 ;
TRACKS Y 340 DO 164 STEP 680 LAYER met3 ;
TRACKS X 460 DO 175 STEP 920 LAYER met4 ;
TRACKS Y 460 DO 121 STEP 920 LAYER met4 ;
TRACKS X 1700 DO 47 STEP 3400 LAYER met5 ;
TRACKS Y 1700 DO 33 STEP 3400 LAYER met5 ;
COMPONENTS 0 ;
END COMPONENTS
PINS 18 ;
- clk + NET clk + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 2720 ) N ;
- rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 5440 ) N ;
- ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 8160 ) N ;
- ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 10880 ) N ;
- ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 13600 ) N ;
- ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 16320 ) N ;
- ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 19040 ) N ;
- ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 21760 ) N ;
- ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 24480 ) N ;
- ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 27200 ) N ;
- uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 29920 ) N ;
- uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 32640 ) N ;
- uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 35360 ) N ;
- uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 38080 ) N ;
- uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 40800 ) N ;
- uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 43520 ) N ;
- uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 46240 ) N ;
- uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
+ PORT
+ LAYER met2 ( -500 -150 ) ( 500 150 )
+ PLACED ( 64500 48960 ) N ;
END PINS
SPECIALNETS 2 ;
- VGND + USE GROUND ;
- VPWR + USE POWER ;
END SPECIALNETS
NETS 18 ;
- clk ( PIN clk ) + USE SIGNAL ;
- rst_n ( PIN rst_n ) + USE SIGNAL ;
- ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
END NETS
END DESIGN