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74 lines
2.5 KiB
Markdown
74 lines
2.5 KiB
Markdown
---
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title: "Tiny Tapeout 02"
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weight: 10
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description: Overview
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---
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{{% toc %}}
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# Design details
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* [Github repository](https://github.com/TinyTapeout/tinytapeout-02)
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* [PDF datasheet](https://github.com/TinyTapeout/tinytapeout-02/raw/tt02/datasheet.pdf)
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* [Verification](https://github.com/TinyTapeout/tinytapeout-02/blob/tt02/VERIFICATION.md)
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* [Efabless MPW submission](https://platform.efabless.com/projects/1410)
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# Launch stats
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* Launched: 9 November 2023
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* Submission closed: 2 December 2023
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* Submitted to Efabless 2211Q chipIgnite shuttle using Skywater 130nm open source PDK
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# Project statistics
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* 165 projects submitted. Each project is 150 x 170um
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* Youngest submitter: [4 years old](https://tinytapeout.com/runs/tt02/031)
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* 64 used Wokwi graphical editor, 82 Verilog, 5 Amaranth, 1 Chisel
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* 39935 standard cells used across all projects.
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* Most cells used in a design was 1105, the least was 8.
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* Max utilisation was 52%
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* Total wire length 2024 mm.
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## Whole die render
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# Project Showcase
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## Wokwi projects
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* [UART-CC](https://tinytapeout.com/runs/tt02/057)
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* [Nano-neuron](https://tinytapeout.com/runs/tt02/066)
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* [Worm in a Maze](https://tinytapeout.com/runs/tt02/084)
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* [Wolf sheep cabbage river crossing puzzle ASIC design](https://tinytapeout.com/runs/tt02/111)
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## HDL projects
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* [Avalon Semiconductors 'TBB1143' Programmable Sound Generator](https://tinytapeout.com/runs/tt02/024/)
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* [Pi (π) to 1000+ decimal places](https://tinytapeout.com/runs/tt02/036)
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* [FPGA test](https://tinytapeout.com/runs/tt02/090)
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* [RV8U - 8-bit RISC-V Microcore Processor](https://tinytapeout.com/runs/tt02/107)
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* [8-bit CPU](https://tinytapeout.com/runs/tt02/085/)
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# Testimonials / Endorsements
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An educational chip development workflow entirely in-browser,
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from graphic entry to GDSII output for #sky130! Stunning work by
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@matthewvenn to make an opaque area of technology accessible.
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---
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Last week I designed an integrated circuit for #tinytapeout, my first digital circuit design not to include any kind of cpu.
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I still can't get over how smooth the ASIC design workflow of the #tinytapeout is
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Thank you @matthewvenn and everyone who made #tinytapeout happen! I made a simple counter FSM based on a UTexas presentation (linked below), but I made it all on my new Steamdeck!
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Created a 128-Bit Memory (8 x 16-Bit Blocks) custom ASIC. I hope it will be manufactured in next shuttle run.
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Aside from that, It was amazing how seamless and easy was the whole process.
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---
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More on [Twitter](https://twitter.com/search?q=tinytapeout).
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