Matthew VennandClaude Opus 5 5cea629360 fix(docs/product): tighten university copy and match YAML hints to the error
Copy: drop the 01-06 feature numbering, which implied a sequence these six
independent benefits do not have. Reword the academic-calendar answer so
the subject is explicit — it previously hung on an "it" with no antecedent
— and replace the unexpanded DFT with the broader documentation point.
Restore "where the process allows" to the analog claim; without it page 1
offered six analog pins unconditionally while page 2 marked two of the
three PDKs as Partial. Remove the €10k discount from the pricing footnote,
where it sat immediately after a €3,325 worked example that does not
qualify for it; it still appears in the page 2 ordering table.

build.py: the YAML parse error printed a hint about escaping HTML quotes
regardless of the actual failure, which sent you looking in the wrong place
for a stray tab. The hint is now chosen from the error.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2026-08-02 20:10:42 +02:00
2025-08-19 23:14:09 +03:00
2023-02-21 13:44:16 +01:00
2025-09-08 16:02:33 +03:00
2025-11-06 11:13:39 +02:00

Tiny Tapeout tools

Tools used mostly by the Tiny Tapeout GitHub Actions

Setup

pip install -r requirements.txt
pre-commit install

On macOS, some third-party libraries are required:

brew install libpng qhull cairo

Documentation

  • checks that basic fields are present in the info.yaml
  • create a PDF data sheet for this one design
  • create SVG and PNG renders of the project's GDS

Reports

  • routing & utilisation
  • yosys warnings
  • standard cell usage and summary

Configuration

  • creates a little TCL shim that tells LibreLane where the source is and the name of the top module
  • makes sure the top module is not called 'top'
  • if you have LibreLane installed locally, then you can harden the design with --harden
S
Description
Miroir GitHub, requis par le checkout interne de TinyTapeout/tt-gds-action sur Gitea Actions
Readme Apache-2.0
9 MiB
Languages
Python 95.6%
Tcl 2.9%
Verilog 0.8%
Makefile 0.4%
Nix 0.2%
Other 0.1%