mirror of
https://github.com/TinyTapeout/tt-support-tools.git
synced 2026-11-03 04:36:09 +01:00
334 lines
13 KiB
Python
334 lines
13 KiB
Python
import glob
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import json
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import logging
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import os
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import shutil
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from typing import List, Set
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import git
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import klayout.db as pya
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import yaml
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from config import Config
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from config_utils import merge_dicts
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from project import Project
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from shuttle_index import ShuttleIndex, ShuttleIndexLayout, ShuttleIndexProject
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from tech import tech_map
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def copy_print(src: str, dest: str):
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os.makedirs(os.path.dirname(dest), exist_ok=True)
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logging.info(f" -> {dest}")
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shutil.copy2(src, dest)
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def copy_print_convert(src: str, dest: str):
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os.makedirs(os.path.dirname(dest), exist_ok=True)
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layout = pya.Layout()
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layout.read(src)
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layout.write(dest)
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logging.info(f" -> {dest} (converted)")
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def copy_print_glob(pattern: str, dest_dir: str):
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for file in glob.glob(pattern):
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copy_print(file, os.path.join(dest_dir, os.path.basename(file)))
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def mux_id_to_xy(mux_id: int, total_mux_rows: int):
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x = (mux_id >> 1) & 1
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y = total_mux_rows // 2 - (2 * (mux_id & 1) - 1) * (mux_id >> 2) - (mux_id & 1)
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return x, y
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class ShuttleConfig:
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def __init__(self, config: Config, projects: List[Project], modules_yaml_name: str):
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self.config = config
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self.projects = projects
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self.script_dir = os.path.dirname(os.path.realpath(__file__))
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self.modules_yaml_name = modules_yaml_name
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pdk = config.get("pdk")
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if pdk is None:
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raise ValueError("PDK is not specified in the configuration.")
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self.tech = tech_map[pdk]
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self.mux_config_yaml_name = os.environ.get(
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"TT_CONFIG", self.tech.mux_config_yaml_name
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)
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self.tt_top_macro = config.get("top_level_macro", "openframe_project_wrapper")
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self.read_mux_config_file()
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total_rows: int = self.mux_config["tt"]["grid"]["y"]
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total_mux_rows = total_rows // 2
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self.layout: ShuttleIndexLayout = {
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"muxes": [["digital"] * total_mux_rows, ["digital"] * total_mux_rows]
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}
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for item in self.mux_config["tt"]["analog"]:
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mux_id: int
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for mux_id in item["mux_id"]:
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x, y = mux_id_to_xy(mux_id, total_mux_rows)
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self.layout["muxes"][x][y] = "analog"
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for item in self.mux_config["tt"].get("huge_modules", {}).get("mux_id", []):
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x, y = mux_id_to_xy(item, total_mux_rows)
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self.layout["muxes"][x][y] = ""
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def read_mux_config_file(self):
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self.mux_config: dict = {}
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for cfg_file in self.mux_config_yaml_name.split(":"):
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cfg_file_path = os.path.join("tt-multiplexer/cfg", cfg_file)
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if not os.path.exists(cfg_file_path):
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logging.error(f"mux config file {cfg_file_path} does not exist!")
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exit(1)
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with open(cfg_file_path, "r") as mux_config_file:
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self.mux_config = merge_dicts(
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self.mux_config, yaml.safe_load(mux_config_file)
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)
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def configure_mux(self):
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with open(self.modules_yaml_name, "r") as modules_file:
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module_config = yaml.safe_load(modules_file)
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configured_macros: Set[str] = set(
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map(lambda mod: mod["name"], module_config["modules"])
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)
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logging.info(
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f"found {len(configured_macros)} preconfigured macros: {configured_macros}"
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)
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for project in self.projects:
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tiles = project.info.tiles
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width, height = map(int, tiles.split("x"))
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if project.unprefixed_name not in configured_macros:
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module_entry = {
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"name": project.unprefixed_name,
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"width": width,
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"height": height,
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"analog": {i: None for i in range(project.info.analog_pins)},
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"pg_vaa": project.info.uses_3v3,
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}
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module_config["modules"].append(module_entry)
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if self.config.get("no_power_gating", False):
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for module in module_config["modules"]:
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module["pg_vdd"] = False
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with open("tt-multiplexer/cfg/modules.yaml", "w") as mux_modules_file:
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yaml.dump(module_config, mux_modules_file)
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res = os.system("make -C tt-multiplexer clean gensrc")
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if res != 0:
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logging.error("Failed to generate multiplexer placement configuration")
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exit(1)
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project_index: List[ShuttleIndexProject] = []
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mux_index_reverse = {}
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with open("tt-multiplexer/cfg/modules_placed.yaml") as placed_modules_file:
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placed_modules = yaml.safe_load(placed_modules_file)
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for module in placed_modules["modules"]:
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mux_address = (module["mux_id"] << 5) | module["blk_id"]
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module_name = "tt_um_" + module["name"]
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project = next(
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p for p in self.projects if p.info.top_module == module_name
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)
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project.mux_address = mux_address
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project_info: ShuttleIndexProject = {
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"macro": module_name,
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"address": mux_address,
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"x": module["x"],
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"y": module["y"],
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"tiles": f"{module['width']}x{module['height']}",
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"repo": project.git_url,
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"commit": project.commit_id,
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}
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assert list(module["analog"].keys()) == list(
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range(len(module["analog"]))
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), f"analog pins are not contiguous for {module_name}"
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project.analog_pins = tuple(module["analog"].values())
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if len(module["analog"]) > 0:
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project_info["analog_pins"] = project.analog_pins
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project_index.append(project_info)
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mux_index_reverse[module_name] = mux_address
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for project in self.projects:
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if project.info.top_module not in mux_index_reverse:
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logging.error(f"no placement found for {project}!")
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exit(1)
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repo = git.Repo(".")
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shuttle_index_data: ShuttleIndex = {
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"name": self.config["name"],
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"repo": list(repo.remotes[0].urls)[0],
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"commit": repo.commit().hexsha,
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"commit_date": repo.commit().committed_date,
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"layout": self.layout,
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"version": 3,
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"projects": project_index,
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}
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with open("shuttle_index.json", "w") as shuttle_index_file:
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json.dump(shuttle_index_data, shuttle_index_file, indent=2)
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with open("verilog/includes/includes.gl.user_projects", "w") as includes_file:
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for project in self.projects:
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if project.is_chip_rom():
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continue
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includes_file.write(
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f"$(USER_PROJECT_VERILOG)/../projects/{project.info.top_module}/{project.info.top_module}.v\n"
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)
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def list(self):
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for project in self.projects:
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logging.info(project)
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def find_last_run(self, macro: str):
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runs = f"tt-multiplexer/ol2/{macro}/runs/"
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if macro == "tt_um_chip_rom":
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runs = "tt/rom/runs/"
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runlist = sorted(
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[
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r
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for r in os.listdir(runs)
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if r.startswith("RUN_") and os.path.isdir(os.path.join(runs, r))
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]
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)
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if len(runlist) == 0:
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print(f"Error: no runs found for {macro}")
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exit(1)
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return os.path.join(runs, runlist[-1])
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def copy_mux_macro(self, source_dir: str, name: str):
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copy_print(
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f"tt-multiplexer/{source_dir}/gds/{name}.gds",
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f"tt-multiplexer/ol2/tt_top/gds/{name}.gds",
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)
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copy_print(
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f"tt-multiplexer/{source_dir}/lef/{name}.lef",
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f"tt-multiplexer/ol2/tt_top/lef/{name}.lef",
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)
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copy_print(
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f"tt-multiplexer/{source_dir}/src/{name}.v",
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f"tt-multiplexer/ol2/tt_top/verilog/{name}.v",
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)
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def copy_logo_macro(self, name: str, source_dir: str = "tt/logo"):
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copy_print(
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f"{source_dir}/{name}.gds",
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f"tt-multiplexer/ol2/tt_top/gds/{name}.gds",
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)
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copy_print(
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f"{source_dir}/{name}.lef",
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f"tt-multiplexer/ol2/tt_top/lef/{name}.lef",
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)
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copy_print(
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f"{source_dir}/{name}.v",
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f"tt-multiplexer/ol2/tt_top/verilog/{name}.v",
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)
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def copy_macros(self):
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logging.info("copying macros to tt_top:")
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copy_print_glob("projects/*/*.gds", "tt-multiplexer/ol2/tt_top/gds")
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# Convert .oas files to .gds
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for file in glob.glob("projects/*/*.oas"):
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converted_name = os.path.splitext(os.path.basename(file))[0] + ".gds"
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copy_print_convert(
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file, os.path.join("tt-multiplexer/ol2/tt_top/gds", converted_name)
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)
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copy_print_glob("projects/*/*.lef", "tt-multiplexer/ol2/tt_top/lef")
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copy_print_glob("projects/*/*.v", "tt-multiplexer/ol2/tt_top/verilog")
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macros = ["tt_um_chip_rom", "tt_ctrl", "tt_mux"]
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for macro in macros:
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lastrun = self.find_last_run(macro)
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copy_print(
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f"{lastrun}/final/gds/{macro}.gds",
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f"tt-multiplexer/ol2/tt_top/gds/{macro}.gds",
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)
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copy_print(
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f"{lastrun}/final/lef/{macro}.lef",
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f"tt-multiplexer/ol2/tt_top/lef/{macro}.lef",
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)
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copy_print(
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f"{lastrun}/final/pnl/{macro}.pnl.v",
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f"tt-multiplexer/ol2/tt_top/verilog/{macro}.v",
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)
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copy_print(
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f"{lastrun}/final/nl/{macro}.nl.v",
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f"tt-multiplexer/ol2/tt_top/verilog/{macro}.nl.v",
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)
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copy_print_glob(
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f"{lastrun}/final/spef/*/*.spef", "tt-multiplexer/ol2/tt_top/spef"
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)
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# Copy power gate / analog switch macros:
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mux_macros = self.tech.mux_macros
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if self.config.get("id") == "ttsky25a":
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# Backward compatibility for ttsky25a shuttle mux with older pg macros
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mux_macros = [m.replace("_hp_", "_") for m in mux_macros]
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for mux_macro in mux_macros:
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self.copy_mux_macro(mux_macro, os.path.basename(mux_macro))
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# Copy logo & shuttle ID
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self.copy_logo_macro("tt_logo_top")
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self.copy_logo_macro("tt_logo_bottom")
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for logo_macro in self.tech.extra_logo_macros:
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self.copy_logo_macro(
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os.path.basename(logo_macro),
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source_dir=os.path.join("tt", os.path.dirname(logo_macro)),
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)
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def copy_final_results(self):
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macros = ["tt_um_chip_rom", "tt_ctrl", "tt_mux", "tt_top"]
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logging.info("copying final results:")
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for macro in macros:
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lastrun = self.find_last_run(macro)
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macro_name = macro if macro != "tt_top" else self.tt_top_macro
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logging.info(f"** {macro_name} **")
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logging.info(f" FROM {lastrun}")
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copy_print(f"{lastrun}/final/gds/{macro_name}.gds", f"gds/{macro_name}.gds")
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if macro != "tt_top":
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copy_print(
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f"{lastrun}/final/lef/{macro_name}.lef", f"lef/{macro_name}.lef"
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)
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copy_print(
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f"{lastrun}/final/pnl/{macro_name}.pnl.v", f"verilog/gl/{macro_name}.v"
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)
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copy_print(
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f"{lastrun}/final/nl/{macro_name}.nl.v", f"verilog/gl/{macro_name}.nl.v"
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)
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shutil.copytree(
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f"{lastrun}/final/spef",
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f"spef/",
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copy_function=copy_print,
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dirs_exist_ok=True,
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)
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def create_foundry_submission(self, foundry_name: str):
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logging.info(f"creating {foundry_name} submission directory:")
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target_dir = foundry_name
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lastrun = self.find_last_run("tt_top")
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copy_print("shuttle_index.md", f"{target_dir}/README.md")
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copy_print("shuttle_index.json", f"{target_dir}/shuttle_index.json")
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if self.config["top_level_macro"] == "openframe_project_wrapper":
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# Chipfoundry requires user_defines.v to be included
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copy_print(
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f"verilog/rtl/user_defines.v",
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f"{target_dir}/verilog/rtl/user_defines.v",
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)
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copy_print(
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f"{lastrun}/final/pnl/{self.tt_top_macro}.pnl.v",
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f"{target_dir}/verilog/gl/{self.tt_top_macro}.v",
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)
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copy_print(
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f"{lastrun}/final/nl/{self.tt_top_macro}.nl.v",
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f"{target_dir}/verilog/gl/{self.tt_top_macro}.nl.v",
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)
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copy_print(
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f"{lastrun}/final/gds/{self.tt_top_macro}.gds",
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f"{target_dir}/gds/{self.tt_top_macro}.gds",
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)
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copy_print_convert(
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f"{lastrun}/final/gds/{self.tt_top_macro}.gds",
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f"{target_dir}/oas/{self.tt_top_macro}.oas",
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)
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