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fix(precheck): allow SRAM and DigiBnd layers in SG13CMOS5L precheck (#187)

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William Zhang
2026-09-17 20:16:53 +02:00
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parent da63c99274
commit cfa06bae53
1 changed files with 1 additions and 1 deletions
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precheck/tech_data.py
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@@ -66,7 +66,7 @@ valid_layers_ihp_sg13cmos5l = [
"Metal3.label", "Metal3.nofill", "Metal3.pin", "Metal3.slit", "Metal3.text", "Metal3.res", "Via3.drawing",
"Metal4.drawing", "Metal4.label", "Metal4.nofill", "Metal4.pin", "Metal4.slit", "Metal4.text", "Metal4.res",
"TopMetal1.nofill", "TEXT.drawing", "Recog.drawing", "Recog.pin", "Recog.esd", "Recog.diode", "Recog.tsv",
"Recog.pdiode", "Recog.mom", "RES.drawing", "RES.label", "HeatRes.drawing", "EXTBlock.drawing", "prBoundary.drawing",
"Recog.pdiode", "Recog.mom", "RES.drawing", "RES.label", "SRAM.drawing", "DigiBnd.drawing", "HeatRes.drawing", "EXTBlock.drawing", "prBoundary.drawing",
"prBoundary.label", "prBoundary.boundary",
]