TinyTapeout/tt-support-tools
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Pat Deegan 41d52a230e TT06+ asic sim support, prelim 2025-08-25 16:24:29 -04:00
Uri Shaked b6ec741349 feat(fpga): initial implementation 
Adds a new `tt_tool.py --create-fpga-bitstream` flag that creates a TT Sim FPGA bitstream from the user's project.
 2024-05-01 23:13:21 +03:00